• Design Verification ( DV

    Cisco (San Jose, CA)
    …developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the ... Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part… more
    Cisco (10/30/24)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    …You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon One ... Specific responsibilities include: * Architect block, cluster and top-level DV environment infrastructure. * Develop DV infrastructure...other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC… more
    Cisco (10/01/24)
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  • Sr. Staff Design Verification

    Lightmatter (Mountain View, CA)
    Sr. Staff Design Verification Engineer Lightmatter is a photonic computer company that is redefining what computers and human beings are capable of by ... team at Lightmatter! We are hiring a Sr. Staff Design Verification Engineer to join...achieving high coverage, and overseeing the final sign-off on Design Verification ( DV ). + Develop… more
    Lightmatter (10/24/24)
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  • Design Verification Infrastructure…

    Capgemini (San Francisco, CA)
    **Job Title: Design Verification Infrastructure Engineer ** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job Description:** **Key Responsibilities:** ... + .Assist the design verification leads to develop software for...to develop software for internal solutions/generators to support SoC DV and Firmware engineers. + .Support existing DV more
    Capgemini (10/05/24)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    …Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers... verification engineers, designers, hardware and cross functional teams to… more
    Cisco (11/01/24)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    …customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development of simulation ... with outstanding talent and vast ASIC development expertise in design , DV , DFT, physical design ,...* Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and… more
    Cisco (10/28/24)
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  • Senior Design Engineer

    Micron Technology, Inc. (San Jose, CA)
    …will include architecture development and product definition, test plan, system integration and verification . Some RTL design verification of the controller ... class memory solutions. You will collaborate with Micron's various design and verification teams all over the...cost, quality, reliability, time-to-market, and customer satisfaction. As an Engineer - NVE Design at Micron Technology,… more
    Micron Technology, Inc. (10/17/24)
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  • ASIC Engineer

    Cisco (San Jose, CA)
    …What You'll Do The Core Hardware Business Unit is looking for a motivated Senior Verification engineer /lead to engage in new development of our UCS family. You ... DV environments and enhancing them * Ensuring complete verification coverage through implementation and review of code and...ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's… more
    Cisco (10/01/24)
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  • Senior Hardware Design Engineer 5

    ManpowerGroup (Mountain View, CA)
    …Generation Techniques o Experience Required: Minimum 10 years o Expertise in pre-Si Design Verification ( DV ) test generation techniques and their application ... Job Title: Hardware Design Engineer 5 Location: Onsite in Mountain View, CA Contract Duration: 6 to 18 months Hourly Pay: $80/hr. - $85/hr. Job Summary: The… more
    ManpowerGroup (11/02/24)
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  • Hardware Engineer

    Randstad US (Mountain View, CA)
    …and augment post-Silicon (post-Si) test generators. + Utilize knowledge of pre-Silicon Design Verification ( DV ) testing techniques and their application ... hardware engineer . + mountain view , california + posted...to post-Si testing. Skills: + Deep understanding of pre-Si DV test generation techniques and applicability to post si-test… more
    Randstad US (11/02/24)
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  • Senior Embedded Software Engineer

    Capgemini (San Francisco, CA)
    **Job description:** We are seeking a highly seasoned Lead Embedded Software Engineer to join our dynamic team. In this role, we will lead and develop, compile, run, ... power tests and evaluation on prototyping platforms. Android development experience . DV experience of developing tests at complex Subsystem or SOC level… more
    Capgemini (10/29/24)
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  • Senior Embedded Engineer - Embedded…

    Capgemini (San Francisco, CA)
    …/ Redmond, WA** **Job description:** We are seeking a seasoned Senior Embedded Software Engineer to join our dynamic team. In this role, you will lead and develop, ... power tests and evaluation on prototyping platforms. Android development experience + DV experience of developing tests at complex Subsystem or SOC level… more
    Capgemini (10/29/24)
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  • Senior Embedded Software Engineer

    Capgemini (San Francisco, CA)
    …in power tests and evaluation on prototyping platforms Android development experience DV experience of developing tests at complex Subsystem or SOC level ... their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors… more
    Capgemini (10/25/24)
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  • Sr./Principal Mixed-Signal Digital Architect

    Lightmatter (Mountain View, CA)
    …You will also define the product and technological roadmaps along with suitable design and verification methodologies. You will report directly to the Chief ... hardware against simulation prediction. + Actively collaborate with the RTL and DV teams to enable block-level implementation and verification , respectively. +… more
    Lightmatter (08/16/24)
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