- Cadence Design Systems, Inc. (San Jose, CA)
- …electrical and electronic circuits, and debug common problems. 2. Excellent knowledge on how power, IR , and EM analyses impact chip planning to IR / EM ... with Parasitic Extraction. 5. Good debugging skills in P&R, STA, and chip power/ IR / EM sign-off. 6. Excellent background in at least one scripting language such… more