- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- Broadcom (San Jose, CA)
- …features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
- Broadcom (San Jose, CA)
- … methodology , power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... you apply.** **Job Description:** Broadcom is lookign for ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more
- Broadcom (San Jose, CA)
- …Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at ... in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical … more
- General Motors (Mountain View, CA)
- …passionate engineer to join our team as a Staff ADAS Perception Systems Design Engineer . This is a great opportunity to work on ground breaking technologies! ... on all General Motors programs. As ADAS Perception Systems Design Engineer , a key enabler for General...+ Collaborate with other groups to shape the SW methodology and policy of GM autonomous driving SW +… more
- Renesas (San Jose, CA)
- …RTL, synthesized, and post route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design constraints ... Senior Staff Engineer , Electrical Design Job Description +...support is a plus + Experience in DFT or physical design is a plus + Experience...plus + Experience in DFT or physical design is a plus + Experience with Verilog and/or… more
- Cisco (San Jose, CA)
- …hardware solutions. Your Impact * Be part of the development organization as an ASIC Design Engineer with primary focus on RTL Design * Create ... performance requirements * Help define, evolve, and support our design methodology * Collaborate with the verification...bugs and close code coverage * Work closely with physical design team to close design… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do * Responsible for… more
- Cisco (San Jose, CA)
- …team to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * ... ASIC team can provide. What You'll Do * You will author design specifications and participate in micro-architecture specification reviews. * Implement Verilog RTL… more
- Broadcom (San Jose, CA)
- …and functional ECOs. In this role, the candidate will apply Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous criteria for ... before you apply.** **Job Description:** Candidate would be required to work on Design Implementation activities related to place and route and/ or timing closure -… more
- Cisco (San Jose, CA)
- …Work With You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology , and tools. * Experience… more
- TE Connectivity (San Francisco, CA)
- Principal Signal Integrity Engineer - Data & Devices At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a ... sustainable and more connected world. **Job Overview** As a Principal Signal Integrity Engineer for TE Connectivity you will focus on the electrical design ,… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... Country: United States State/Province: California City: San Jose **Summary** The Staff Engineer , Software develops, debugs, tests, deploys and supports code to be… more
- Gilead Sciences, Inc. (Foster City, CA)
- …Join Gilead and help create possible, together. **Job Description** **Sr. Quality Engineer - Combination Products, Tech Transfer and Commercial** This opportunity is ... these new product lines in the commercial stage, starting with collaborating with the design and development team on Design Transfer. We are looking for a… more
- Capgemini (San Francisco, CA)
- **Job role:** **Lead DV IP Verification Engineer ** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create verification ... environments using System-Verilog and UVM (Universal verification) methodology for IP verification. IP verification must have and SoC verification good to have.… more
- Broadcom (San Jose, CA)
- … methodology , power planning and analysis, timing closure, STA, signal integrity and physical design checks. + Participate in large complex design ... you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …issues impacting production schedule. Hands-on knowledge / experience on analog and mixed-signal physical Design / Debug /would be a plus. The role demands ... qualities. Position Requirements: This position requires a solid understanding of IC design process/ methodology in analog and mixed-signal design . The… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do * Responsible for… more