- Capgemini (San Francisco, CA)
- …by Capgemini. **Job:** _Project Manager_ **Organization:** _ERD PPL US_ **Title:** _Principal E / E & Semiconductor Engineer_ **Location:** _CA-San Francisco_ ... and testing. . Manage design from architecture to tape-out, foundry and outside semiconductor assembly & test (OSAT). . Responsible for determining the types of… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Job Title: Principal Product Engineer Location: San Jose, CA Reports to: Product Engineering Director Job ... verification languages and methodologies like SystemVerilog, VHDL, C/C++ UVM, ' e ' + Experience and understanding of client/server technologies, database… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and verification languages and methodologies like SystemVerilog, VHDL, C/C++ UVM, ' e ', UPF, SystemC, SVA. + Experience and understanding of client/server ... company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and… more