- Microsoft Corporation (Mountain View, CA)
- …Azure cloud servers, clients, and augmented reality. We are looking for a **Senior** ** Silicon ** ** Design Engineer ** to work on leading edge custom IP ... produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a...custom IP blocks, working with a group of other design team members, design verification engineers, and… more
- Microsoft Corporation (Mountain View, CA)
- …a wide range of disciplines within silicon development including architecture, design , verification, physical design , firmware, product validation, data ... - and excitement for the journey ahead. As a Silicon Engineer , you will work with progressive,...not limited to logic design , verification, circuit design , physical design , and … more
- Cisco (San Jose, CA)
- …Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do You will be part of ... -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture... physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will… more
- Microsoft Corporation (Mountain View, CA)
- …SOCs, cloud accelerators, cloud servers, and clients. We are looking for a Senior Design Verification Engineer to work on leading edge IP (intellectual property) ... produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a...work and beyond. We are looking for a **Senior Design Verification Engineer ** to join the team.… more
- Cisco (San Jose, CA)
- …and testing some of the most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex ... the Team The Common Hardware Group (CHG) delivers the silicon , optics, and hardware platforms for Cisco's core Switching,...multi-hierarchy designs, ensuring robust physical design processes like logic synthesis and… more
- Cisco (San Jose, CA)
- …verified. You will work closely with Back-end team on timing signoff for seamless physical design closure. You will also collaborate with the System and Software ... are received. Meet the Team The Common Hardware Group (CHG) delivers silicon , optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless… more
- Cisco (San Jose, CA)
- Join the Cisco Silicon One team in developing a unified ...bugs and close code coverage. * Work closely with physical design team to close design ... silicon architecture for web scale and service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources… more
- Cisco (San Jose, CA)
- Join the Cisco Silicon One team in developing a unified ...bugs and close code coverage. * Work closely with physical design team to close design ... silicon architecture for web scale and service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources… more
- Cisco (San Jose, CA)
- …to address design bugs and close code coverage. * Work closely with the physical design team to close design timing and place-and-route issues. * Triage, ... San Jose, CA. Meet the Team Join the Cisco Silicon One team in developing a unified silicon...Electrical or Computer Engineering with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer… more
- Broadcom (San Jose, CA)
- …flow, simulations, and verification + Specify and verify various behavioral and physical memory models + Document the design specifications, behavioral ... before you apply.** **Job Description:** We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an… more
- Capgemini (San Francisco, CA)
- **Job description:** We are seeking a highly seasoned Lead Embedded Software Engineer to join our dynamic team. In this role, we will lead and develop, compile, run, ... targeting ARM CPUs and DSPs. You will work in pre- silicon (virtual, emulation, and FPGA platforms) and post- silicon...digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Job Description: IC Design Engineer ** + Participate in IP level architectural definition ... team on test plan development, debugging, and coverage closure + Collaborate with physical design team on constraint generation, timing closure analysis, formal… more
- Cisco (San Jose, CA)
- …flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do * Responsible for thorough ... We Are The Common Hardware Group (CHG) delivers the silicon , optics, and hardware platforms for Cisco's core Switching,...-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture… more
- Teledyne (Mountain View, CA)
- …for current and emerging challenges. Teledyne Microwave Solutions is hiring a Digital Design Engineer that will be responsible for the digital design ... circuits and related development. Participates in all phases of physical design , including floor planning, clock synthesis,...IDEs such as Code Composer Studio, Visual Studio, and/or Silicon Labs IDE + Demonstrates good judgment in selecting… more
- Broadcom (San Jose, CA)
- … design trade-offs. You will collaborate closely with verification engineers and physical design teams to ensure functional correctness, timing closure, and ... is a leader in semiconductor innovation, delivering cutting-edge custom silicon solutions for AI, networking, HPC among many other...and Timing Closure:** + Perform synthesis and work with physical design teams to achieve timing closure… more
- Capgemini (San Francisco, CA)
- …Run & Debug C/C Bare-metal/Firmware/Software tests/apps (targeting ARM CPU's/DSP) in Pre- Silicon (Virtual, Emulation and fpga platforms) & Post- Silicon ( ... setups Perform unit testing, end-to-end testing of SW/HW features in pre/post silicon setups Run tests for performance, power characterization in pre/post silicon… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to integrating such high power devices into complex scalable enterprise grade hardware. The design / verification / physical design of these ASICs pushes ... is an industry leading emulation platform used for emulating complex custom silicon designs used by top semiconductor industries globally . The Palladium platform… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …on Chip, CPU Cores & DSP, and Vision Cores. The intern will work with the Physical Design CAD team and R&D to adopt latest capabilities to optimize the PPA ... to make an impact on the world of technology. The Cadence Silicon Solutions Group (SSG) develops industry-leading Digital IP (Intellectual Property), from RISC-V… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Candidate would be required to work on Design Implementation activities related to place and route and/ or timing closure - ... partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC). Should be able drive tools and methodologies… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Mechanical/Thermal modeling focus for its ASIC packaging team to support the development of ... custom Silicon for Infrastructure as well as to develop packaging...of a world-class engineering team. **Required Skills:** ASIC Packaging Engineer Responsibilities: 1. As an ASIC Packaging Engineer… more