- Google (Sunnyvale, CA)
- Senior ASIC Power Engineer , ML Accelerators _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... + 5 years of experience in logic design, digital ASIC , or SoC design. + Experience with RTL (Register...Level) design using Verilog or SystemVerilog. + Experience with low- power design or power reduction methodologies/techniques. **Preferred… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a ... service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications. + Analyze architectural… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... teams to define system-level architecture of mixed-signal chips for power delivery and power management solutions. +...+ Strong familiarity and experience with all stages of ASIC design flow including front end design and verification,… more
- Google (Mountain View, CA)
- Senior ASIC Engineer , IP Design, Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA; San Diego, CA, USA **Mid** Experience driving progress, ... like Python or Perl. + Experience with ARM-based SoCs, interconnects and ASIC methodology. **Preferred qualifications:** + Master's degree or PhD in Electrical… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking ... team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications. + Analyze architectural… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... or CPU clocks to satisfy all the architectural/design/physical constraints. + Improve Power , Performance, and Area (PPA) of innovative NVIDIA chips by evaluating… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... with related domains such as clocking, STA, place & route, and power optimization. + Experience in post-silicon bring-up on ATE, including understanding of… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic ... What you'll be doing: + You will drive physical design of high-frequency and low- power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Test Timing Engineer to join our dynamic and growing ... up with timing closure strategy, creating timing constraints, driving timing and power convergence, as well as ECO implementation + Apply knowledge and experience… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation. + Work in a cross-functional… more
- NVIDIA (Santa Clara, CA)
- …design and Physical design teams responsible for achieving timing, area, performance and power goals of the unit. + Help define the architecture for next-generation ... expertise is preferred as is a deep understanding of ASIC design flow including RTL design and verification, DFT,...love the challenge of crafting the fastest and most power -efficient chips in their class? If so, we want… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- Amazon (Cupertino, CA)
- …to Global 500 companies trust our robust suite of products and services to power their businesses. Diverse Experiences AWS values diverse experiences. Even if you do ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- NVIDIA (Santa Clara, CA)
- …the backbone of the world's most advanced AI data centers. We are seeking a senior verification engineer to help us ensure the quality and correctness of this ... We are looking to hire a Chip Design Verification Engineer to join NVIDIA Chip Design group. The work...the forefront of technology in terms of performance and power efficiency. Our team is at the heart of… more
- NVIDIA (Santa Clara, CA)
- …testability features for next-generation product that are vital for performance, power optimization and management techniques all the way from feature definition ... position. + Previous experience with silicon bringup, frequency and power characterization, PPA in Pre-Silicon or Post-Silicon phases, tester-to-system correlation,… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** Looking for a design engineer to work on challenging high speed design of complex modules for ... concepts, such as clocking, timing, pipelines, and performance vs area/ power tradeoffs. **Additional Job Description:** **Compensation and Benefits** The annual… more
- Broadcom (San Jose, CA)
- …industry, including AI. Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in areas such ... before you apply.** **Job Description:** Are you a versatile, senior engineer capable of leading external and...required to do the following:** + Manage external customer ASIC programs from inception to finish, including RFQs, technology… more