- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe ... Engineer , you will support the technical presales of DDR IP by generating collateral through simulations, synthesis and...simulations, synthesis and publications. As you grow into more senior roles, you will use your knowledge of different… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a ... for NVIDIA CPUs and SOCs. What You Will Be Doing: + Analyze future DDR /LPDDR/HBM technologies to determine optimum performance, power, function and RAS in memory for… more
- NVIDIA (Santa Clara, CA)
- …understand the world. NVIDIA is seeking a Senior Cloud Service Provider (CSP) Application Engineer to join our team. In this role, you will collaborate with ... deployment. + Solid understanding of x86 server architecture, PCIe, DDR , Infiniband and high-speed interconnects + Basic understanding of...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …or explore sales/marketing career opportunities, the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead in your ... solve their toughest verification problems using Cadence technology. Join our elite application engineering team for verification to work closely with the best AEs,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA has pioneered visual computing, the art and ... BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...Experience with physical layer of interconnects such as Memory ( DDR , LPDDR etc..) , PCIE , SerDes + Experience… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem IP verification Team! At NVIDIA, we have ... programming experience + Prior Design or Verification experience of dynamic memory controllers ( ddr {2, 3, 4, 5}, lpddr{2, 3,4,5, 6}) + Strong debugging and problem… more
- NVIDIA (Santa Clara, CA)
- …for our next generation products for scan architecture, ATPG, MBIST, and IOBIST applications . + You will also help mentor junior engineers on test designs and ... Knowledge of high-speed interface architectures such as PCIe, USB3, DDR is a plus. + Excellent analytical skills in...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- SpaceX (Sunnyvale, CA)
- …hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual level and base ... Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was...in IP integration (eg memories, I/O's, analog IPs, SerDes, DDR etc.) + In-depth knowledge of industry standard EDA… more
- Celestica (San Jose, CA)
- …Region: Americas Country: USA State/Province: California City: San Jose **Summary** The Principal Engineer , PCB Layout is a senior technical leader and Subject ... networks (PDN), optimizing return paths, and minimizing crosstalk for critical interfaces (eg, DDR , PCIe). + Expert-level knowledge and application of Design for… more