• ASIC Design Efficiency

    NVIDIA (Santa Clara, CA)
    We are now looking for an ASIC Design Efficiency Engineer ! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... to extend the state of the art performance and efficiency . + Understand the design and implementation,...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (05/09/24)
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  • ASIC Design Verification…

    Qualcomm (Santa Clara, CA)
    …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
    Qualcomm (06/12/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design ...and propose and implement new ways to improve the efficiency in the GPU/CPU clocking design . What… more
    NVIDIA (06/05/24)
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  • ASIC Design Verification…

    Google (Sunnyvale, CA)
    …of hardware experiences, delivering unparalleled performance, efficiency , and integration. As a ASIC Design Verification Engineer , you will be part of a ... degree or PhD in Electrical Engineering. + 4 years of experience in design verification. + Experience in power aware verification, gate level simulations, and post… more
    Google (06/28/24)
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  • ASIC /SoC System Level Test Engineer

    Google (Sunnyvale, CA)
    …and networking technologies that power all of Google's services. As a System Level Test Engineer , you design and build the systems that are the world's largest ... of System level Test and Product Engineering activities. You will work with ASIC Architecture, Design , and Pre-silicon SoC Verification teams to define test… more
    Google (06/27/24)
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  • SoC Modeling ASIC Engineer

    Meta (Sunnyvale, CA)
    …through architecture, to firmware, and algorithms.We are seeking an SoC Modeling ASIC Engineer to support C++/Python modeling and software interfaces of ... pipelines to the dedicated hardware accelerators. **Required Skills:** SoC Modeling ASIC Engineer Responsibilities: 1. Analyze the software pipelines and… more
    Meta (06/21/24)
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  • Senior ASIC Power Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... efficiency + You are expected to understand the design and implementation, develop power metrics and drive power...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (05/30/24)
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  • Senior ASIC Front End Infrastructure…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
    NVIDIA (06/27/24)
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  • Senior ASIC Verification and Infrastructure…

    NVIDIA (Santa Clara, CA)
    …+ 5+ years of relevant industry experience + Exposure to computer architecture, ASIC design , and verification methodology is required + Experience with ... NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in tools...with a specialty in tools and automation to drive efficiency and collaboration among our High Speed IO engineering… more
    NVIDIA (05/18/24)
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  • Silicon Packaging Design Engineer

    Meta (Menlo Park, CA)
    **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of ... create as part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for… more
    Meta (06/28/24)
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  • Senior RTL Design Engineer , Silicon

    Google (Mountain View, CA)
    …PhD in Electrical Engineering, Computer Engineering, or Computer Science. + Experience with ASIC design methodologies for clock domain checks, reset checks and ... FPGA and emulation platforms. + Experience with high performance and energy efficient design techniques. + Experience with ASIC Verification or DFT. + Knowledge… more
    Google (07/12/24)
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  • Senior Staff Physical Design

    Google (Sunnyvale, CA)
    …or a related field, or equivalent practical experience. + 10 years experience in ASIC physical design flows and methodologies in advanced process nodes. + ... Experience with ASIC physical design , physical design ...the next generation of hardware experiences, delivering unparalleled performance, efficiency , and integration.Behind everything our users see online is… more
    Google (05/22/24)
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  • Staff Hardware Systems Design

    Google (Sunnyvale, CA)
    …unparalleled performance, efficiency , and integration. As a Staff Hardware Systems Design Engineer , you will work on Machine Learning/AI hardware systems ... 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced...goals are met with systems and will work with ASIC /FPGA, Software, and Verification teams to ensure proper verification… more
    Google (06/25/24)
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  • Senior Mechanical Design Engineer

    Cisco (San Jose, CA)
    …are the Service Provider (SP) Mechanical and Thermal team responsible for the design of Cisco's best high-performance, provider class routers, the Cisco 8000 series. ... The Cisco 8000 series utilizes Cisco's revolutionary Silicon One ASIC that delivers unmatched performance and density with feature-rich functionality. We are… more
    Cisco (07/12/24)
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  • Physical Design Engineer , Static…

    Google (Sunnyvale, CA)
    …and timing ECO creation). + Experience in working across various physical design areas (ie, EDA scripting, block level synthesis, floorplanning, place and route, ... ASICs. Preferred qualifications: + 12 years of experience in the domain of physical design and static timing analysis. + Experience leading one or more aspects of… more
    Google (06/21/24)
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  • Senior Power Optimization and Analysis…

    NVIDIA (Santa Clara, CA)
    …and Analysis Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study ... for analyzing fullchip and unit-level power data, and driving ASIC teams to improve their units' power efficiency...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
    NVIDIA (05/18/24)
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  • Power Optimization and Analysis Engineer

    NVIDIA (Santa Clara, CA)
    …Analysis Team , you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study ... for analyzing fullchip and unit-level power data and driving ASIC teams to improve their units' power efficiency...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
    NVIDIA (06/07/24)
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  • Senior Emulation Power Engineer

    NVIDIA (Santa Clara, CA)
    …Power Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, Product teams and Physical Design ... for analyzing fullchip and unit-level power data and driving ASIC teams to improve their units' power efficiency...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
    NVIDIA (05/18/24)
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  • Senior Architecture Energy Modeling…

    NVIDIA (Santa Clara, CA)
    …Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software ... We are now looking for an Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient...in energy-efficient GPU designs. + Familiarity with Verilog and ASIC design principles is a plus. +… more
    NVIDIA (07/14/24)
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  • Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency . We are continually innovating to deliver new and creative, unusual solutions to ... we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in...position will collaborate with Technical Package Lead and different design teams in the design and development… more
    NVIDIA (05/21/24)
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