- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the… more
- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... will be responsible for the verification closure of a design module or sub-system from test -planning, UVM...to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... will be responsible for the verification closure of a design module or sub-system from test -planning, UVM...to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... will be responsible for the verification closure of a design module or sub-system from test -planning, UVM...to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards… more
- GE HealthCare (Palo Alto, CA)
- …design teams, and Hardware Subsystem teams to help deliver mixed-signal and digital ASIC design solutions. The candidate will engage with module owners and ... associated demodulation, digital filtering, etc functional blocks) and digital ASIC design * Familiarity with System Verilog...solutions to ASIC * Scope and define ASIC test and verification plans, ensuring … more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... will be responsible for the verification closure of a design module or sub-system from test -planning, UVM...to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class ... complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and...signal routing - As a key member of the ASIC design team, you will implement and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class ... complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Micro-architecture development 2. RTL… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL...Design -for- Test . You will work with Front-end RTL teams, backend...for thorough test planning and development of test benches to verify comprehensive Design -for- Test… more
- Cisco (San Jose, CA)
- …with suppliers and offshore manufacturing personnel. Who You'll Work With We collaborate with ASIC design teams as well as several peer groups in Supply Chain ... role will require high level of collaboration and interaction with Product Test Engineering, Design Engineering, Quality Engineering, Assembly Engineering and… more
- Meta (Sunnyvale, CA)
- …exploration for compute Accelerators 3. Micro-architecture development 4. Collaboration with Design , verification and emulation teams in test plan development ... **Summary:** Meta is hiring Performance Architect ASIC Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine… more
- NVIDIA (Santa Clara, CA)
- …creativity and intelligence! In this role, you will work closely with Architects and ASIC Engineers to define and implement test plan, own all tasks involved ... based on architecture and microarchitectural specs. Drive testplan reviews with design /architecture teams. + Develop testbenches and checkers based on UVM… more
- Google (Mountain View, CA)
- …for complex ASIC project(s). + Experience with pre-silicon and post-silicon Design For Test (DFT). + Experience in sign-off convergence including Static ... leadership in the area of Application Specific Integrated Circuit ( ASIC ) physical design as we realize sophisticated...floor planning, place and route, Clock Tree Synthesis (CTS), Design For Test (DFT) (Scan, MBIST, BISR),… more
- Cisco (San Jose, CA)
- …with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC . In addition, you will have ... do: * As a member of the Mixed Signal Design team, you will be a key member of...Validation: -Solid ESD laboratory practices and methodology -Construction of test setup to test specific circuitry Software… more
- Cadence Design Systems, Inc. (San Jose, CA)
- … design of high-speed interfaces. Prior experience of collaborating with Physical Design teams in multiple successful ASIC /IP tapeouts. Knowledge of the ... your responsibilities will span across various aspects for the ASIC frontend flow, which includes RTL integration, maintain the...closure flow and methodology. Strong command of synthesis, STA, design for test , and design … more
- Google (Sunnyvale, CA)
- …performance, efficiency, and integration. In this role, you will work on the test design , bring-up, characterization, debug, and long term reliability of ... with hardware description languages (eg, System Verilog) and chip design flow. + Experience building test automation...test infrastructure developers to ensure we have proper ASIC test coverage for an entire program.… more