• ASIC Digital Physical

    Broadcom (San Jose, CA)
    …in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design or PhD in Electrical Engineering or Computer Engineering with ... 7+ years of experience in Physical design . + Deep knowledge about industry...TSMC 7nm-2nm, ie understanding of power consumptions, area, estimated design and layout efforts for digital blocks,… more
    Broadcom (11/22/24)
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  • Sr. SOC/ ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Engineer...and CMOS solid state physics + Knowledge of CMOS digital design principles, basic standard cells their ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (11/15/24)
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  • ASIC Design Technical Leader…

    Cisco (San Jose, CA)
    ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... refining design and timing constraints for seamless physical design closure. As part of this...with STA tools like PrimeTime/Tempus * Understanding of related digital design concepts (eg. clocking and async… more
    Cisco (12/12/24)
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  • ASIC Design Engineer

    Cisco (San Jose, CA)
    …team to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * ... With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco...to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it?… more
    Cisco (11/15/24)
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  • Senior ASIC Physical Design

    Capgemini (Santa Clara, CA)
    **Job Title : Senior ASIC Physical Design Engineer**... and software to support the convergence of the physical and digital worlds. Coupled with the ... US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_… more
    Capgemini (10/16/24)
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  • ASIC Design Verification Engineer

    Cisco (San Jose, CA)
    …You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching...develop innovative technology, and to power a more inclusive, digital future for everyone. How do we do it?… more
    Cisco (10/28/24)
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  • ASIC Design Verification Engineer…

    Palo Alto Networks (Santa Clara, CA)
    …equivalent military experience required - MSEE preferred + Minimum 5 years experience in ASIC design verification + Demonstrated success in taking ASIC ... mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world...we all win with precision. **Your Career** As a Design Verification engineer on the ASIC team,… more
    Palo Alto Networks (12/06/24)
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  • ASIC Engineer Intern, Design

    Meta (Sunnyvale, CA)
    **Summary:** Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon which ... Engineering or related engineering fields 11. Experience with Lint, Synthesis, Formal or Physical Design tools 12. Scripting capability with Python or Perl 13.… more
    Meta (11/02/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …System-Verilog, with a good understanding of Computer Architecture and Digital Systems design . + A deep understanding of ASIC design flow including ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design...synthesis/timing clean design while working with the physical design team to ensure a routable… more
    NVIDIA (11/05/24)
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  • ASIC Design for Test Technical…

    Cisco (San Jose, CA)
    …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
    Cisco (11/15/24)
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  • Senior ASIC Integration and CAD Engineer

    Palo Alto Networks (Santa Clara, CA)
    …You will collaborate closely with the ASIC vendor and the PANW ASIC design team in floorplanning, closing timing, validating constraints, and optimizing ... RAMs, CAMs, custom IPs, and IO pads throughout the design hierarchy + Collaborate with external ASIC ...+ RTL quality checks: Lint, CDC, RDC, X-verification + Physical design for networking ASICs with wide… more
    Palo Alto Networks (12/21/24)
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  • ASIC Engineer Intern, Implementation

    Meta (Sunnyvale, CA)
    …**Required Skills:** ASIC Engineer Intern, Implementation Responsibilities: 1. Participate in Design Implementation, Physical Design , and Design ... **Summary:** Meta is seeking an ASIC Engineer Intern to join our Infrastructure organization....efficiently. You will have an opportunity to participate in design implementation/emulation, physical design , EDA… more
    Meta (11/04/24)
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  • ASIC Physical Design Engineer…

    Amazon (Cupertino, CA)
    …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis,...Spice Circuit analysis - Experience with Place and Route, digital implementation - Experience with EDA tools from Synopsys… more
    Amazon (10/04/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …basis to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues * ... Do Be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL... Engineering Technical Leader with primary focus on RTL Design . * Create micro-architecture specifications and participate in reviews… more
    Cisco (11/01/24)
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  • ASIC Engineer II (Full Time) United States

    Cisco (San Jose, CA)
    …processor architecture, Ethernet processing, digital signal processing, high-speed logic design & verification, memory designs, and physical design ... and efficient memory designs, custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology.… more
    Cisco (11/18/24)
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  • ASIC Design Engineer, Blink/Ring…

    Amazon (Sunnyvale, CA)
    …Ph.D degree in Electrical / Communications Engineering - 7+ years of experience in digital design - Experience with physical implementation flows Amazon is ... or related field, or equivalent experience - 5+ years of experience in digital design - Experience with products that have gone to volume production - Hands… more
    Amazon (11/16/24)
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  • ASIC DFT Verification Technical Leader

    Cisco (San Jose, CA)
    …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
    Cisco (10/19/24)
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  • ASIC STA Engineer

    Cisco (San Jose, CA)
    …strategies, and correlation between PNR, Spice, and STA, along with advising the Physical Design team on best practices. * Additionally, you'll develop ... accuracy. Who you'll work with You will collaborate with ASIC Front-end and Back-end teams to understand chip architecture...refining design and timing constraints for seamless physical design closure. As part of this… more
    Cisco (11/08/24)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …rendering hardware accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital ... firmware, and algorithms.We are growing our Graphics & Display ASIC Design and uArchitecture team within RL...a world-class group of researchers and engineers using your digital design skills to implement and contribute… more
    Meta (12/20/24)
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  • Manager II, Silicon Digital Design

    Google (Mountain View, CA)
    …or Clocks/Reset. + Knowledge of ASIC Verification, DFT, synthesis, STA, or Physical Design . + Knowledge of high performance and low-power design ... with an emphasis on computer architecture. + Experience with ASIC design methodologies for clock domain checks,...+ Work closely with the multi-site cross-functional teams: Verification, Design for Test, Physical Design more
    Google (12/07/24)
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