- BAE Systems (San Jose, CA)
- …of experience in ASIC /FPGA Development (Verilog, System Verilog, UVM **Pay Information** Full - Time Salary Range: $147300 - $250400 Please note: This range is ... the form of a **hybrid work format** , with time split between working onsite and remotely. **Required Education,...position level and/or job specifics. **Senior Principal Front End ASIC Design Engineer (Hybrid)** **102613BR** EEO Career… more
- Cisco (San Jose, CA)
- …What You'll Do You will join the Quality and Reliability organization as ASIC Reliability Engineer and lead all aspects of product qualification including ... the post-silicon validation cycle to meet Product Quality and Time to Market Metrics. In a multi-function team, you...results and transferring new tests and test programs into full manufacturing release by collaborating with suppliers and offshore… more
- ManpowerGroup (New Almaden, CA)
- …today! What's in it for you? + **Pay: $55 - $60/hr. (Negotiable)** + ** Full time ** + **Benefits:** Health insurance (medical, dental, vision), 401k + match, ... **Senior ASIC Design Engineer ** Our client in **San Jose, CA** is looking for hardworking, motivated talent to join their team. Don't wait apply… more
- Google (Sunnyvale, CA)
- …+ Familiarity with ASIC standard interfaces and memory system architecture. As a ASIC Design Verification Engineer , you will be part of a team developing ... best and fastest experience possible. The US base salary range for this full - time position is $127,000-$187,000 + bonus + equity + benefits. Our salary ranges… more
- Google (Sunnyvale, CA)
- …of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a ASIC Design Verification Engineer , you will be part of a ... have the best and fastest experience possible. The US base salary range for this full - time position is $127,000-$187,000 + bonus + equity + benefits. Our salary… more
- Amazon (Sunnyvale, CA)
- …team is involved in early architectural and micro-architectural trade-offs to reduce time -to-revenue by shortening the DV cycle. Innovators will be delighted with ... be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit… more
- Amazon (Sunnyvale, CA)
- …team is involved in early architectural and micro-architectural trade-offs to reduce time -to-revenue by shortening the DV cycle. Innovators will be delighted with ... be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit… more
- Google (Mountain View, CA)
- …make people's lives better through technology. The US base salary range for this full - time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ... ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and… more
- Google (Mountain View, CA)
- …make people's lives better through technology. The US base salary range for this full - time position is $127,000-$187,000 + bonus + equity + benefits. Our salary ... ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and… more
- Tarana Wireless (Milpitas, CA)
- …engineers to define verification strategies and execute plans at system or full chip level + Build and continuously improve verification infrastructure and ... to employees in this role including: Medical, dental and vision benefits, 401K match, flexible time off and stock option. Since our founding in 2009, we've been on a… more
- Google (Mountain View, CA)
- …to long term ASIC strategy. The US base salary range for this full - time position is $177,000-$266,000 + bonus + equity + benefits. Our salary ranges ... in Physical Implementation of High Performance ASICs. + Experience building ASIC implementation flows (RTL-to-GDS2). Preferred qualifications: + Master's degree or… more
- Cisco (San Jose, CA)
- …to high volume manufacturing. Creative Hardware Engineering positions available in: * ASIC Design * Verification System/Board Design * Circuit Board Layout * ... certifications. * Proficient experience in hardware engineering areas such as ASIC Design and Verification, System/Board Design, Circuit Board Layout, Hardware… more
- Google (Mountain View, CA)
- …make people's lives better through technology. The US base salary range for this full - time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ... in Electrical Engineering, Computer Engineering or Computer Science. + Experience with ASIC design methodologies for clock domain checks, reset checks and low power… more
- Renesas (San Jose, CA)
- Senior Staff Engineer , Electrical Design Job Description + Propose, Architect, and Design RTL in Verilog for use in a Mixed Signal Integrated Circuit + Contribute ... route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in...experience, and skillset of the candidate. Renesas offers a full range of elective benefits including medical, health savings… more
- Micron Technology, Inc. (San Jose, CA)
- …US base salary range that Micron Technology estimates it could pay for this full - time position is: $166,000.00 - $283,000.00 Our salary ranges are determined by ... communicate and advance faster than ever. We are seeking a Principal HW Design Engineer to join our fast-paced Central Engineering HW Group at Micron Technology! We… more
- Google (Sunnyvale, CA)
- …have the best and fastest experience possible. The US base salary range for this full - time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ... integration. As a Chip Package Signal and Power Integrity Engineer you will be responsible for the chip package...the part of a larger team with Chip Architects, ASIC Engineers, Physical Design and other SI/PI Engineers. You… more
- Amazon (Sunnyvale, CA)
- …the world. Come work at Amazon! The Role: As Senior Silicon ATE Test Engineer , you will engage with an experienced cross-disciplinary staff to conceive and design ... optimize tester and vector parameters to ensure timing and repeatability. Work with ASIC design teams ensure the test equipment and processes required for production… more
- Google (Sunnyvale, CA)
- …have the best and fastest experience possible. The US base salary range for this full - time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ... years of experience in static timing (ie, to create full chip timing constraints, perform full chip...analysis, timing ECO creation, and final timing sign-off for ASIC tape outs. + Perform block level synthesis, floorplanning,… more
- Verilab (San Jose, CA)
- …addition to being good, we like to be seen to be good. As a permanent full - time employee of Verilab, you will be responsible for all aspects of verification ... to complete methodology engineering. We innovate, implement, manage and coach. Benefits + Full - time permanent employee with competitive salary. + 20 days paid… more
- Bosch (Sunnyvale, CA)
- …Testing and debugging of designs for spec compliance from predevelopment through full product validation and supporting definition of test plans for product ... block requirements from system requirements + Supporting the company on ASIC development topics **Qualifications** **Basic Qualifications** + PhD in Electrical… more