• ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …Account, please Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple ... **Experience:** + Requires a minimum of 8 years of related ASIC implementation experience. + BS degree in Electrical Engineering or Computer Engineering… more
    Broadcom (11/11/24)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …have a Candidate Account, please Sign-In before you apply.** **Job Description:** ASIC implementation engineer with demonstrated expertise in multiple ... Electrical Engineering or Computer Enginering and 8+ years of related ASIC implementation experience. Post graduate degree in EE/CE is desirable. **Additional… more
    Broadcom (11/01/24)
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  • ASIC Engineer

    Meta (Sunnyvale, CA)
    …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in… more
    Meta (10/18/24)
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  • ASIC Engineer Intern,…

    Meta (Sunnyvale, CA)
    ASIC engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Implementation Responsibilities: 1. Participate in ... **Summary:** Meta is seeking an ASIC Engineer Intern to join our...You will have an opportunity to participate in design implementation /emulation, physical design, EDA infrastructure methods, and design power… more
    Meta (11/04/24)
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  • ASIC Digital Design Engineer - WiFi…

    Qualcomm (San Jose, CA)
    …to help create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design, optimize, verify, validate, implement, ... degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree… more
    Qualcomm (09/23/24)
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  • ASIC Design Verification Engineer

    Cisco (San Jose, CA)
    …cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. What You'll Do You will contribute to developing ... and directed stimulus. * Ensure complete verification coverage through implementation and review of code and functional coverage. *...of design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware… more
    Cisco (10/01/24)
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  • Senior ASIC Floorplan Design…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan... design teams by influencing early design and physical implementation decisions. + You will build tools and improve… more
    NVIDIA (11/06/24)
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  • ASIC Engineer

    Cisco (San Jose, CA)
    …of the most complex ASICs being developed in the industry. What You'll Do As ASIC Verification Engineer in The Core Hardware Business Unit, you will be engaged ... the following tasks: * Implementation of DV infrastructure for block, cluster and top...Are *Have a good understanding of the fundamentals of ASIC Design verification principles. *Ability to understand functional specifications… more
    Cisco (11/08/24)
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  • ASIC Verification Engineer - GPU

    NVIDIA (Santa Clara, CA)
    …is seeking elite ASIC Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity ... you'll be doing: + As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs + You will be… more
    NVIDIA (11/02/24)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    …is seeking elite ASIC Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity ... you'll be doing: + As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs + You will be… more
    NVIDIA (10/01/24)
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  • ASIC Engineer , Power

    Meta (Sunnyvale, CA)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Power Responsibilities: 1. Work with Architecture and Design teams ... **Summary:** Meta is hiring ASIC Power Engineers within our Infrastructure organization to...with the understanding of system level concepts Evaluation and Implementation of low-power design techniques at different levels of… more
    Meta (10/12/24)
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  • ASIC Engineer

    Cisco (San Jose, CA)
    …Do The Core Hardware Business Unit is looking for a motivated Senior Verification engineer /lead to engage in new development of our UCS family. You will have an ... ASIC design and verification background with hands-on experience in...and enhancing them * Ensuring complete verification coverage through implementation and review of code and functional coverage *… more
    Cisco (10/01/24)
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  • ASIC Engineer , Physical Design

    Meta (Sunnyvale, CA)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
    Meta (10/22/24)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This ... What you'll be doing: + As a Senior Verification Engineer at NVIDIA, you will be responsible for verifying...and test-planning for memory subsystem units + Collaborate with ASIC designers and architects in deriving feature and micro-architecture… more
    NVIDIA (10/25/24)
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  • ASIC Rtl Design Engineer , Machine…

    Google (Sunnyvale, CA)
    …PhD in Electrical Engineering or Computer Science. + 4 years of experience in digital/ ASIC design using SystemVerilog or RTL. + Experience in one or more successful ... ASIC products from concept to silicon. + Experience interacting...You will participate in the microarchitecture, design, documentation, and implementation of the next generation of Machine Learning center… more
    Google (11/13/24)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in test plan development and debug 7. Collaboration with implementation team to close the design on timing and… more
    Meta (10/18/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to ... design team, you will be responsible for the micro-architecture and design implementation of GPU memory subsystem modules. + Make architectural trade-offs based on… more
    NVIDIA (11/05/24)
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  • ASIC Design Verification Engineer

    Cisco (San Jose, CA)
    …You'll Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with ... verification engineers, designers, hardware and cross functional teams to verify the ASIC in simulation, in emulation and during ASIC bring up. What You'll Do: *… more
    Cisco (11/01/24)
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  • Senior ASIC Physical Design Engineer

    Capgemini (Santa Clara, CA)
    **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... instances and clock frequencies about 1 GHz + Experience with low power implementation and signoff, power gating, multiple voltage rails, UPF knowledge. + Experience… more
    Capgemini (10/16/24)
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  • ASIC Engineer , DFT

    Meta (Sunnyvale, CA)
    …DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT strategies ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to...organization to work on Design for Test (DFT) methodologies, implementation , and verification to build best-in-class System on a… more
    Meta (10/18/24)
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