• ASIC and/or FPGA Design

    The Boeing Company (Mountain View, CA)
    …& Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers** (Entry Level, Associate, or ... across the company and around the world and support ASIC / FPGA design and verification...HDL coding, and physical design realization (through gate -level netlists for ASIC designs) + Integrate… more
    The Boeing Company (12/20/25)
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  • ASIC Engineer, Leo Manufacturing

    Amazon (Sunnyvale, CA)
    …software programming language, or experience in embedded development in C/C+- Experience with modern ASIC / FPGA design and verification tools - Knowledge ... company DNA. As part of a project team you will work alongside Senior ASIC Engineers; supporting the design , debug, validation and optimization of the products.… more
    Amazon (12/20/25)
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  • ASIC Chip Lead

    Broadcom (San Jose, CA)
    …solutions. This key role requires a deep, end-to-end understanding of the entire ASIC architecture, design , and verification flow-from initial concept and ... Broadcom is seeking a highly experienced and accomplished Principal ASIC Chip Lead to lead the development of cutting-edge...RTL design , logic synthesis, static timing analysis, design verification , clock domain crossing, and low… more
    Broadcom (12/16/25)
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  • Design Verification Engineer

    Broadcom (San Jose, CA)
    …of RTL verification methodologies including System Verilog. + Strong experience in ASIC design verification flows and DV methodologies + Strong working ... Account, please Sign-In before you apply.** **Job Description:** The ASIC Product Division in Broadcom, a leading supplier of...Must be comfortable working in a team environment with verification team and design team members. +… more
    Broadcom (11/20/25)
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  • Senior FPGA Prototyping Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …with emphasis on Synopsys Protocompiler or Siemens VPS and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). + ... + Build FPGA prototypes by making RTL FPGA -friendly, partitioning the design and taking it...and testing infrastructure and verify the correctness of the design . + Good coordination with architects, designers, verification more
    NVIDIA (12/09/25)
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  • Hardware Engineer II (Co-op) - United States

    Cisco (San Jose, CA)
    …through to high volume manufacturing. Creative Hardware Engineering positions are available in: + ASIC Design and Verification + System/Board Design + ... signal integrity, power electronics, or embedded system design . + Knowledge of FPGA / ASIC design flow and basic understanding of VHDL/Verilog is a plus.… more
    Cisco (11/14/25)
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  • Sr. Technical Program Manager, ASIC

    Amazon (Sunnyvale, CA)
    …of managing various phases of pre-silicon such as architecture, front end design , pre-silicon verification , FPGA prototyping, Emulation, Physical ... ASIC /SOC leads) to create project execution plans for ASIC /SOC development considering all criteria to design ... phases of Silicon development from architecture definition, RTL design , Verification , IP design , Physical… more
    Amazon (11/27/25)
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  • Senior Hardware Engineer- FPGA

    Cisco (Milpitas, CA)
    …Electrical Engineering or relevant degree and 4+ years of related experience + FPGA or ASIC development experience from specification to production. + Experience ... devices and tools. **Preferred Qualifications** + Experience with UVM and/or VMM Verification methodology. + Experience with high-speed design debug. +… more
    Cisco (12/20/25)
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  • Sr. Hardware Engineer - ML Acceleration, Annapurna…

    Amazon (Cupertino, CA)
    …debug, as well as performance, power, area analysis and trade-offs - Experience with modern ASIC / FPGA design and verification tools - Experience with SOC ... customers change the world. We are seeking a Hardware Design Engineer with role in the definition, design and validation of AWS next generation ML Chips, Cards… more
    Amazon (10/06/25)
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  • Senior IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …emphasis on first pass success. + Collaborate and partner with ASIC design engineers, IP architects and other verification engineers to formalize product ... or Computer Engineering (or equivalent experience) + 5+ years of proven design verification experience + Expertise in verifying sophisticated IP's with… more
    NVIDIA (09/23/25)
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  • Lead Principal Electrical Design Engineer

    Micron Technology, Inc. (San Jose, CA)
    …to practical design challenges. **What Sets You Apart:** + Experience with FPGA / ASIC design using HDL languages (Verilog, VHDL, SystemVerilog). + ... circuits, including system and POL power supplies. + Lead FPGA design using HDL and coordinate component...Familiarity with FPGA / ASIC development tools such as Vivado or… more
    Micron Technology, Inc. (10/27/25)
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  • Staff Logic Design Engineer

    Teledyne (Milpitas, CA)
    …required + MS in EE is a plus + **7+ years** of experience in digital logic design for FPGA or ASIC . + Strong proficiency in **Verilog/SystemVerilog RTL ... FPGA tools (ILA/SignalTap). + **Documentation & Process** + Create design specifications, interface documents, and verification plans. + Participate in… more
    Teledyne (11/18/25)
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  • Hardware Engineer

    Cisco (Milpitas, CA)
    …or 5+ years of experience with a Bachelors' degree. Experience expected to be in ASIC / FPGA design . + Proficiency in end-to-end FPGA development process. ... Impact** We are looking for a skilled and proactive FPGA Design Engineer with 3+ years of... FPGA development lifecycle, including independent RTL coding, verification , high-speed design practices, and debugging on… more
    Cisco (12/16/25)
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  • Sr. RTL Design Engineer - Wireless Modem,…

    Amazon (Sunnyvale, CA)
    …a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design team. This team is using industry leading methodologies to develop ... solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your...related field, or equivalent experience. . 7+ years in FPGA digital logic design , preferably in DSP… more
    Amazon (10/07/25)
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  • RTL Design Engineer, Multimedia and Machine…

    Google (Mountain View, CA)
    …power, performance and area goals. + Participate in synthesis, timing/power closure and Field-programmable Gate Array ( FPGA )/silicon bring-up. + Create ... Property (IP)(Camera, Display or COdec) or Machine Learning IP. + Experience with ASIC design methodologies for clock domain checks and reset checks. +… more
    Google (11/20/25)
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  • Senior Hardware Systems Design Engineer,…

    Google (Sunnyvale, CA)
    …with product teams to ensure that goals are met with systems and will work with ASIC / FPGA , software, and verification teams to ensure proper verification ... data center engineering, server, storage, and networking products. + Experience with FPGA /CPLD design and interfacing with other disciplines, including software,… more
    Google (10/30/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …to help meet the power requirements 14. Experience in digital design Micro-architecture, SoC integration, ASIC architecture and graphics accelerators ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...definition and RTL implementation 2. Contribute to chip-level integration, verification plan development and verification 3. Define… more
    Meta (12/20/25)
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  • Staff Hardware Systems Design Engineer,…

    Google (Sunnyvale, CA)
    …with Product teams to ensure that goals are met with systems and will work with ASIC / FPGA , Software, and Verification teams to ensure proper verification ... Staff Hardware Systems Design Engineer, Board and Systems _corporate_fare_ Google _place_...6 years of experience working in a hardware systems design , or 5 years of experience with an advanced… more
    Google (10/22/25)
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  • Senior Applications Engineer - DDR Design

    Cadence Design Systems, Inc. (San Jose, CA)
    …Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA ... an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team develops industry… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Lead Applications Engineer - DDR Design IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …memory subsystem verification and/or performance analysis . Knowledge of System Verilog and FPGA design . Knowledge of AXI, DFI and MIPI protocols . Working ... teams, definers and designers . Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit manuscripts for internal… more
    Cadence Design Systems, Inc. (10/04/25)
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