• Design Verification Engineer

    Meta (Sunnyvale, CA)
    …C/C++ based verification and UVM methodology. 10. 5+ years experience in IP /sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based ... Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta RL Silicon team is driving the...verification plans for each of the different core IP . 2. Define and track detailed test plans for… more
    Meta (07/19/24)
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  • Sr. Program Manager - CPU IP

    Qualcomm (Santa Clara, CA)
    …and help tracking flow issues through Jira isue management * Responsible for IP - SoC relationship & partnership program management. * Troubleshoot physical design ... will be responsible for providing technical program management support to our Custom CPU Engineering team including the following responsibilities: * Work with… more
    Qualcomm (07/12/24)
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  • Senior Hardware SoC Architect, Architecture…

    NVIDIA (Santa Clara, CA)
    …software, ASIC design, verification , physical design, VLSI and platform teams. Our SoC architects excel at pushing the state of the art, while making the best ... We are now looking for a Senior Hardware SoC Architect for our Tegra team! Do you...aspects of our architectures that bring together NVIDIA GPUs, custom processors and accelerators into a single chip. Your… more
    NVIDIA (06/13/24)
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  • Senior SOC Physical Design Engineer,…

    Amazon (Sunnyvale, CA)
    Description The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Sr. SOC ... Work hard. Have fun. Make history. As a Senior SOC Physical Design Engineer, you will: - Work with...level. - Drive block physical implementation through synthesis, formal verification , floor planning, bus / pin planning, place and… more
    Amazon (09/11/24)
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  • SoC Modeling ASIC Engineer

    Meta (Sunnyvale, CA)
    …them to the hardware accelerators 2. Work with architecture team to understand the SoC and IP architecture and develop methodology for enabling sw/hw co-design ... Demonstrated experience in mapping software use cases to hardware accelerators and custom silicon 9. In-depth understanding of system-on-chip ( SoC ) architecture,… more
    Meta (08/07/24)
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  • ASIC/ SoC , Account Technical Executive

    Cadence Design Systems, Inc. (San Jose, CA)
    …are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our ... of the core technology requirements in the digital , custom and function verification space, coordination of sales strategies and efforts across worldwide… more
    Cadence Design Systems, Inc. (07/06/24)
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  • SoC Performance Manager

    Meta (Sunnyvale, CA)
    …our SoCs. You will collaborate with a world-class group of system, SW, SoC and IP architects, modeling, development, and validation teams, and program/project ... compute performance and power efficiency requirements of Mixed and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the… more
    Meta (07/31/24)
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  • Semi- Custom Design Methodology Engineer

    NVIDIA (Santa Clara, CA)
    SOC / IP Methodology Engineer to help design and architect next generation custom SoC / IP solutions. We are looking for special individuals with passion ... semi- custom design methodologies, work with internal and external collaborators and IP Vendors on SOC / IP requirements and drive technology alignments… more
    NVIDIA (07/23/24)
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  • Principal Architect Memory Hierarchy

    Microsoft Corporation (Sunnyvale, CA)
    …for a diverse set of systems. We are responsible for delivering cutting-edge, custom SoC designs that can perform complex and high-performance functions in ... with the product and platform architecture teams, peer System on Chip ( SoC ) architects, IP architects, Performance/Modeling architects, Software (OS and… more
    Microsoft Corporation (09/10/24)
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  • Silicon Power Architect

    Meta (Sunnyvale, CA)
    …projections from algorithms on generic compute units to custom silicon IP blocks, traditional compute benchmarking, and SOC and System level implications. ... candidate will work with architecture, design, backend, system and verification teams and drive the team towards implementing the...in technology node scaling and projections. 18. Experience in custom IP block power estimates. 19. Experience… more
    Meta (09/10/24)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …or block level uArchitecture definition and design of Computer Vision/Image Sensing IP . 2. Contribute to chip-level integration, verification plan development ... also support the Digital Silicon Architects developing and implementing the next generation custom and semi- custom mixed signal ICs to drive our industry leading… more
    Meta (07/26/24)
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  • Sr. Principal Analog Design Engineer

    Skyworks (San Jose, CA)
    …ultra-low power analog circuits, highly efficient power management systems and custom hardware accelerators to enable smart acoustic signal processing and AI ... team of world-class analog, mixed-signal and digital design and verification engineers committed to building the next generation of...Austin, TX" Responsibilities: * Bring state of the art IP and products to market. * Provide guidance and… more
    Skyworks (08/14/24)
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  • Senior Electrical Engineer

    Microsoft Corporation (Mountain View, CA)
    …quality and lowest cost is of paramount importance. To achieve this goal, the Semi- custom and Central IP Silicon (SCIPS) team is instrumental in architecting, ... Production, Characterization & Reliability testing. + Support test related activities with SoC , DFT, DV and Test teams. + Collaborate effectively with architects,… more
    Microsoft Corporation (09/11/24)
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  • Senior FPGA Engineer

    Vector Atomic (Pleasanton, CA)
    …define requirements and select FPGA/ SoC parts + Assist in the design of custom PCBs based on modern FPGA/ SoC devices + Identify and address critical design ... HDL coding (Verilog and/or VHDL) for synthesizable RTL and verification + Experience with EDA tools such as Vivado...(eg, Git, Jira) Additional Preferred Qualifications + Experience with SoC designs, such as Zynq, Ultrascale, and/or Arria +… more
    Vector Atomic (07/28/24)
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  • Silicon Prototyping FPGA Engineer

    Meta (Sunnyvale, CA)
    …faster. **Required Skills:** Silicon Prototyping FPGA Engineer Responsibilities: 1. Own IP / SoC pre-silicon deployment efforts and ensure timely delivery of ... platform builder, comfortable working on boards, sensors, displays, RTL design/ verification , CV/ML/Gfx algorithms, virtual platforms, OS/RTOS kernel and driver… more
    Meta (08/06/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …to resolve PV issues and address to proper owners * Deploy and improve physical verification flows and methodologies. Develop custom check as per need for ... for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will include: * Perform full chip… more
    Cisco (08/28/24)
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