- Meta (Sunnyvale, CA)
- …at the entire stack, from transistor, through architecture, to firmware, and algorithms. As a DFT Engineer at Meta Reality Labs, you will play an integral role ... effort in getting functional products to millions of customers quickly. **Required Skills:** DFT Engineer Responsibilities: 1. Work with the Silicon teams to… more
- Qualcomm (Santa Clara, CA)
- …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and...using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 5+ years of practical experience… more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are problem ... test methods needed for data collection. + Hands-on knowledge of industry standard DFT EDA tools. + Proficiency in programming and scripting languages, such as… more
- Palo Alto Networks (Santa Clara, CA)
- …manufacturing capabilities to build our next-generation network firewalls. As a Hardware Test Engineer ( DfT ), you will be responsible for building advanced test ... and serviceability with ICT and boundary scan + Drive DfT and test coverage analyses from early Prototype design...testing experience + Experience with electronics system design and DfT + Experience with Boundary Scan development tools like… more
- Cisco (San Jose, CA)
- …Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you ... groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... + In addition, you will help develop and deploy DFT methodologies for our next generation products. + You...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... in our team, you will help develop and deploy DFT verification methodologies for various DFT features...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …experience) with 5+, MSEE with 3+, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of fundamental DFT topics, such ... of MBIST and IOBIST fundamentals. + Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Cisco (San Jose, CA)
- …Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you ... networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow...You'll Do * Responsible for implementing the Hardware Design-for-Test ( DFT ) features that support ATE, in-system test, debug and… more
- Microsoft Corporation (Mountain View, CA)
- …of Artificial Intelligence and Computing. We are looking for a **Senior Silicon Engineer ** to join our team! If you are like tackling complex Register Transfer ... hierarchical and block-level partitions between RTL, Design for Testability ( DFT )-inserted RTL and Gate-level/Power-Ground (PG) Connected netlists on Microsoft's… more
- SpaceX (Sunnyvale, CA)
- Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars ... enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience...crossing (CDC) logic + Exposure to Design For Test ( DFT ), understanding of scan and writing DFT … more
- NVIDIA (Santa Clara, CA)
- We are looking for a creative ATE Test Development Engineer . NVIDIA has continuously reinvented itself for three decades. Our invention of the GPU in 1999 fueled the ... + Actively participate with cross functional teams including Product Development Engineering, DFT , and IC design to efficiently debug product failures and implement… more
- Insight Global (Sunnyvale, CA)
- Job Description Insight Global is looking for a Sr. R&D Engineer . The consultant needs to work well with cross-functional team members both within our clients team ... and Requirements 10+ years of related experience Synopsys Fusion Compiler/ICC2 (Synthesis, DFT insertion, Place & Route, Chip Finishing, PT-SI STA, Timing Closure,… more
- Meta (Sunnyvale, CA)
- …and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using advanced optimization ... work with the Designers to create waivers. 5. Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults. 6. Perform Flat and Hierarchical Clock… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Sr. SOC Design Engineer -STA to continue to innovate on behalf of our customers. We are a part of ... - Work for Systems and Architecture, SoC Integration, Verification, DFT , Mixed Signal, IP owners, Synthesis, Place & Route...micro-architecture, RTL design and functional verification - Experience with DFT and DFM flows Amazon is committed to a… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a part of ... planning, bus routing, sequential pipeline planning and top-level design for testability ( DFT ). - Be responsible for driving efficiency and quality improvements to… more
- Amazon (Sunnyvale, CA)
- …the world. Come work at Amazon! The Role: As Senior Silicon ATE Test Engineer , you will engage with an experienced cross-disciplinary staff to conceive and design ... SoCs tested on Teradyne and Advantest equipment. Convert test patterns from the DFT team into tester-suitable formats (eg ATP). Run test vectors on test platforms… more
- Cisco (San Jose, CA)
- …Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you ... networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow...physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will include: * Perform full… more
- Teradyne (San Jose, CA)
- …an open collaborative peer environment. Role & Responsibilities As a Test Engineer you will be responsible for defining and implementing manufacturing test strategy ... NPI engineers, Product Engineers to provide design for testability ( DFT ) feedback throughout the design process . Investigate and...built free of manufacturing defects. . Deep understanding of DFT and DFM methods . Interested and able to… more