- NVIDIA (Santa Clara, CA)
- …team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + Key ... and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips....are needed for NVIDIA chips. + Participate in developing flow and tool methodologies for chip floorplan, power and… more
- NVIDIA (Santa Clara, CA)
- …+ Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/ integration flow , and design automation + Strong coding skills in ... NVIDIA is hiring a SOC/IP Methodology Engineer to help design and architect next...front-end design quality checks and reviews to present the physical design team with high-quality RTL What we need… more
- Google (Sunnyvale, CA)
- …+ Experience leading one or more aspects of physical design or physical design flow / methodology , to successful tape-outs and shipping silicon. + ... the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration . As a Physical Design Engineer on the chip… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …your responsibilities will span across various aspects for the ASIC frontend flow , which includes RTL integration , maintain the timing constraint, Synthesis, ... Static timing analysis (STA), timing closure, power optimization, and physical verification for both of block and Chip top...ASIC/IP tapeouts. Knowledge of the IP/SoC level timing closure flow and methodology . Strong command of synthesis,… more
- Amazon (Sunnyvale, CA)
- …In this role you will: * As the implementation lead you will set up the flow for both logic and physical synthesis flow for various technology nodes. ... or smaller. * Experience leading or solely developing the methodology and scripts for physical synthesis. *...of experience in ASIC implementation. * Experience in leading physical design. * Strong exposure to UPF flow… more
- Cisco (San Jose, CA)
- …focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early ... help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical … more
- Lucile Packard Children's Hospital Stanford (Palo Alto, CA)
- …of equity. + Demonstrate financial acumen and a deep understanding of payment methodology , funds flow , physician incentives, and cost control techniques. + ... a key role in strategic planning, program development, and clinical program integration focused on growth and sustainability of the SMCH Enterprise. Represents the… more
- BD (Becton, Dickinson and Company) (Milpitas, CA)
- …support packages and bootloaders. . Develop, maintain, and extend automated build flow methodology . Develop and integrate SoC systems, specifically utilizing ... Xilinx or Altera/Intel FPGA technologies. . Support system-level integration of FPGA solutions. . Optimize existing systems for performance improvements and… more
- Amazon (Sunnyvale, CA)
- …history. Roles & Responsibilities: - Includes definition and development of signoff methodology and corresponding implementation solution - Flow for STA, ... flow . - Work for Systems and Architecture, SoC Integration , Verification, DFT, Mixed Signal, IP owners, Synthesis, Place...to work closely with IP Design teams and Backend Physical Design teams across multiple sites. Preferred Qualifications -… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- …Determine issues/challenges having the most value to the organization and determine methodology to utilize in interpreting and gathering data from multiple sources ... analytics across the organization. Collaborate with IT to ensure data integration , accessibility, performance of BI tools, and the design and implementation… more