- Cadence Design Systems, Inc. (San Jose, CA)
- …flows, Extraction, Power, EMIR and/or physical design and ensure integrity of delivered solutions . Individual should be able to efficiently work with Cadence R&D to ... constraints, advanced OCV/SOCV concepts, derates, PBA timing, Distributed, Concurrent and Hierarchical STA flows. . Work efficiently with R&D and customer to enable… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** **Technical Skills/ background:** The Design Architect/ Lead will lead a small team of engineers to interact ... timing tool - Ability to generate and understand timing reports Deep understanding of STA concepts - Solid understanding of RC networks and how they affect the… more
- Broadcom (San Jose, CA)
- …Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position at our San Jose, California Development ... seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role,...drive innovation within the team. + Working closely with STA and DI Engineers design closure for test +… more
- Belcan (Palo Alto, CA)
- Sr. Physical Design Engineer Job Number: 354330 Category: Design Engineering Description: Job Title: Sr. Physical Design Engineer Pay rate: $66.34 /hr. Location: ... Keywords: #PaloAltoJobs; #PhysicalDesignEngineerjobs; Job Description: As a Sr. physical design engineer , you will contribute to all design phases of physical design… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** Technical Lead for Physical Designs Are you a versatile, senior engineer ... a resident expert in areas such as physical design, STA , DFT, and packaging? Have you taped out so...supplies a broad range of semiconductor and infrastructure software solutions . For more information please visit our video library… more
- Google (Sunnyvale, CA)
- …cross-functional teams, including chip top design, physical design, Static Timing Analysis ( STA ), package, and system teams. + Experience with 2.5D/3D package design ... (eg, silicon interposer, silicon bridge, 3D die stacking, STA , Voltage budget). + Expertise in signal and power integrity for various high speed interconnects (eg,… more
- Qualcomm (Santa Clara, CA)
- …our team, you'll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. ... Our focus is on developing server-class high performance CPU solutions that are highly optimized for the needs of...the server product. As a CPU Floorplan and Integration Engineer , you will work with microarchitecture, RTL design and… more
- Broadcom (San Jose, CA)
- …division is a leader in semiconductor innovation, delivering cutting-edge custom silicon solutions for AI, networking, HPC among many other applications. We are ... domains crossings. **Key Responsibilities:** **Technical Leadership and Domain Expertise:** + Lead the design and implementation of advanced digital blocks and… more
- Google (Sunnyvale, CA)
- …cross functionally with chip top design, physical design, static timing analysis ( STA ), package, system, validation teams. + Experience in high speed serdes IP ... part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute… more