- NVIDIA (Santa Clara, CA)
- …methodologies + Build flows for methodologies incorporating logic/physical synthesis , design planning, equivalence checking for industry-leading chip designs ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis , physical design, formal equivalence checking. + Proven track record developing flows… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …through simulations, synthesis and publications. As you grow into more senior roles, you will use your knowledge of different memory interface standards to ... to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San...the benefit of both technical growth and business skill development . You will be part of the Technical Field… more
- NVIDIA (Santa Clara, CA)
- …protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing ... We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC...micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Collaborate and coordinate with architects,… more
- NVIDIA (Santa Clara, CA)
- …synthesis at either block or full-chip level, at project execution and/or flow development . + Strong experience in full-chip/sub-chip Static Timing Analysis ... asynchronous checking including clock domain crossing checks and MTBF analysis, logic synthesis , netlist quality checks, etc. + Help in all aspects of physical… more
- NVIDIA (Santa Clara, CA)
- …+ Knowledge of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely considered to be the leader ... CPUs and GPUs. + Explore design space, create optimum floorplan, drive synthesis , physical implementation, and timing closure by understanding arch/logic as well as… more
- NVIDIA (Santa Clara, CA)
- …channels. + Interest or have prior experience in efficiency enhancement, such as, flow development and code generator. + Good debugging and analytical skills. ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement...Systems design. + A deep understanding of ASIC design flow including RTL design, verification, logic synthesis ,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to design and verify ... Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Support post-silicon validation activities working with… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, design ... and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams to accomplish your tasks. What we… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... be responsible for the micro-architecture and design including RTL design, synthesis , functional verification and timing analysis using groundbreaking CAD tools and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow . + Exhibit excellent communication skills and be ... + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding of fundamental physical design flows and stages +… more
- Intuit (Mountain View, CA)
- …deep understanding of consumer attitudes, needs, and motivations to guide the development of innovative tax and financial experiences in TurboTax, TurboTax Live. Our ... inspired. We are looking for a curious and collaborative senior design researcher to join our team who is...+ Strong moderation skills, able to adapt to the flow of conversation and probe to uncover deeper insights… more
- NVIDIA (Santa Clara, CA)
- …and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis , timing analysis and ... We are now looking for a Senior Design for Debug (DFD) Architect and Methodology...work experience. + Experience in Computer Architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …112G, 56G. . Familiarity with state-of-the-art SoC design implementation: RTL design, synthesis and static timing analysis, physical design flow , testbench ... product R&D teams) relative to their requirements. . Influencing the IP product development roadmap by communicating customer needs to the product R&D teams. .… more
- Intuit (Mountain View, CA)
- …research methods, experimentation design, heuristic design principles, and analysis and synthesis techniques. They balance quality and rigor with speed so teams ... when and how to apply them during the product development process + Proficiency with communicating user research findings...teams on quality research. + Adapts effectively to the flow of discussion and pivot off-script to follow relevant… more
- Qualcomm (Santa Clara, CA)
- …meets system requirements and customer needs. * Evaluates all aspects of complex process flow from high-level design to synthesis , place and route, timing and ... the finite-precision models into ASIC hardware using SystemC/C++ for HLS(High-Level Synthesis ) as the primary hardware description language that meet the area… more
- SpaceX (Sunnyvale, CA)
- …engineering or computer science + 5+ years of ASIC and/or physical design flow development experience in industry PREFERRED SKILLS AND EXPERIENCE: + Strong ... and capabilities of the Starlink network. RESPONSIBILITIES: + Perform partition synthesis and physical implementation steps (eg synthesis , floorplanning,… more
- SpaceX (Sunnyvale, CA)
- …core development and integration + Responsible for RTL design, synthesis , timing constraints, power estimation, and timing analysis using industry-leading CAD ... of experience working with ASICs and the VLSI design flow + Experience in RTL development and...Familiarity with Unified Power Format (UPF) for simulation and synthesis + Programming skills in C, PERL/Python + An… more
- Amazon (Sunnyvale, CA)
- …such as Cadence Virtuoso, Mentor, EMX, and Ansys-HFSS. Familiarity with digital flow : synthesis , simulation, verification, and regression tools. Excellent oral ... the world. Come work at Amazon! The Role: As Senior RF Silicon CAD engineer you will be responsible...an opportunity to define the CAD environment and design flow for upcoming new projects. You'll advise on tools… more