• ASIC/ SoC System Level Test Engineer

    Google (Sunnyvale, CA)
    …or equivalent practical experience. + 5 years of experience with hardware testing of systems based on custom ASICs or SoC products. + Experience with Linux/Unix, ... from the lowest levels of circuit design to large system design and see those systems all...users. In this role, you will help to integrate SoC ( System on Chip) technologies into High… more
    Google (06/27/24)
    - Save Job - Related Jobs - Block Source
  • Machine Learning IP Design Verification…

    Amazon (Cupertino, CA)
    …assertions and coverage - 2+ years of experience verifying multiple levels of logic including: IP blocks and full SOC system testing - Experience with C/C++, ... Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of...Qualifications - 4+ years of design verification experience using System Verilog and UVM - 4+ years of experience… more
    Amazon (06/26/24)
    - Save Job - Related Jobs - Block Source
  • SoC Modeling ASIC Engineer

    Meta (Sunnyvale, CA)
    …them to the hardware accelerators 2. Work with architecture team to understand the SoC and IP architecture and develop methodology for enabling sw/hw co-design ... use cases to hardware accelerators and custom silicon 9. In-depth understanding of system -on-chip ( SoC ) architecture, SoC memory hierarchy, and ASIC design… more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • Information Security Director

    Cadence Design Systems, Inc. (San Jose, CA)
    …are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our ... cybersecurity and security assurance certifications such as ISO, Cloud, and SOC certifications and accreditation. + Build and maintain security intelligence and… more
    Cadence Design Systems, Inc. (07/19/24)
    - Save Job - Related Jobs - Block Source
  • Director Physical Design Engineer

    Microsoft Corporation (Sunnyvale, CA)
    …Development Organization (CCDO) is seeking a Physical Design (PD) CPU/High performance Intellectual Property ( IP ) design Lead/Engineer who is technically ... Central Processing Unit (CPU) & Custom Accelerator based in-house System on Chip ( SOC ) designs, which is...responsible for RTL to GDS2 implementation for IPs , sub-chips/sub- systems and/or SOC level design (in latest… more
    Microsoft Corporation (07/19/24)
    - Save Job - Related Jobs - Block Source
  • Principal Physical Design Engineer

    Microsoft Corporation (Sunnyvale, CA)
    …Development Organization (CCDO) is seeking a Physical Design (PD) CPU/High performance Intellectual Property ( IP ) design Lead/Engineer who is technically ... Microsoft Silicon, Cloud, Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's...Central Processing Unit (CPU) & Custom Accelerator based in-house System on Chip ( SOC ) designs, which is… more
    Microsoft Corporation (07/19/24)
    - Save Job - Related Jobs - Block Source
  • 3D IC Solutions Engineer- Software…

    Siemens Digital Industries Software (Fremont, CA)
    …An additional responsibility is to implement an integrated data management and digital threading system to manage the diverse set of IP , design kits, and ... in the increasingly complex world of chip, board and system design. **Job Overview** Siemens EDA is seeking a...design/analysis data included in the workflows using commercial IP Life Cycle Management (IPL) commercial software. Reference designs… more
    Siemens Digital Industries Software (05/26/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable block/ IP /sub- system / SoC level verification 2. Develop...or SVN 16. Experience with verification of ARM/RISC-V based sub- systems or SoCs 17. Experience with IP more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification. 2. Develop...or SVN. 17. Experience with verification of ARM/RISC-V based sub- systems or SoCs. 18. Experience with IP more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification 2. Develop...or SVN 17. Experience with verification of ARM/RISC-V based sub- systems or SoCs 18. Experience with IP more
    Meta (06/21/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... for the verification closure of a design module or sub- system from test-planning, UVM based testbench development to verification...Responsibilities: 1. Lead the DV effort of complex Compute IP 's, from start to finish 2. Define and implement… more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • Senior Design For Test Engineer

    Microsoft Corporation (Mountain View, CA)
    …and characterization. + Generate IP DFT collateral for System on Chip ( SoC ) integration. Embody our Culture ... Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's...importance. To achieve this goal, the Semi and Custom IP team is instrumental in defining and delivering operational… more
    Microsoft Corporation (07/16/24)
    - Save Job - Related Jobs - Block Source
  • Principal Business Development Specialist

    Renesas (Milpitas, CA)
    …be responsible for identifying new potential markets and customers for custom System -on-Chip ( SoC ) solutions. They will develop strategies for targeting these ... and infrastructure . Qualifications *Experience working with customers in custom SoC business as a salesperson or engineer. *Basic knowledge of market strategy… more
    Renesas (07/11/24)
    - Save Job - Related Jobs - Block Source
  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …SystemVerilog, C/C++ based verification and UVM methodology. 10. 5+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog ... and use your digital design and verifications skills to implement the testing infrastructure to validate new core IP implementations and contribute to… more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Design

    Meta (Sunnyvale, CA)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Power

    Meta (Sunnyvale, CA)
    …to silicon), developing flows around EDA tools, and low-power design to build efficient System on Chip ( SoC ) and IP for data center applications. ... **Summary:** Meta is hiring ASIC Power Engineers within our Infrastructure organization to work on low level power designs....13. Experience with architectural performance and power models at SoC and system level. 14. Understanding of… more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Design

    Meta (Sunnyvale, CA)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... using Verilog, System Verilog and HLS. 4. Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test… more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer, Design

    Meta (Sunnyvale, CA)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... using Verilog, System Verilog and HLS 4. Soft and hard IP identification, selection and integration 5. Collaboration with verification and emulation teams in… more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • Silicon Validation Engineer

    Meta (Sunnyvale, CA)
    …delivery. **Required Skills:** Silicon Validation Engineer Responsibilities: 1. Responsible for SoC and E2E system validation plan development, execution and ... report activities. 6. Work with cross-functional teams (ie, architecture, IP , FW, EE, SoC , and product engineer...and product engineer teams) to generate validation reports for SoC and systems . 7. Able to work… more
    Meta (07/19/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Rtl Design Engineer, Machine Learning…

    Google (Sunnyvale, CA)
    system hardware, and other cross-functional teams. + Experience defining SoC IP interfaces and methodologies. + Understanding in computer architecture/memory ... everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers… more
    Google (07/19/24)
    - Save Job - Related Jobs - Block Source