- SpaceX (Sunnyvale, CA)
- Sr . SOC / ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC TIMING SIGNOFF &...critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Synthesis and Front-End STA Engineer/ Senior : $170,000.00 -… more
- SpaceX (Sunnyvale, CA)
- Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER...capabilities of the Starlink network. RESPONSIBILITIES: + Perform partition synthesis and physical implementation steps (eg synthesis ,… more
- SpaceX (Sunnyvale, CA)
- Sr . FPGA/ ASIC Design Engineer (Silicon Engineering).../timing clean design + Participate in all phases of ASIC and/or FPGA design flow (eg synthesis , ... the ultimate goal of enabling human life on Mars. SR . FPGA/ ASIC DESIGN ENGINEER (SILICON ENGINEERING) At...problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with… more
- Actalent (West Menlo Park, CA)
- …top non-negotiable skill sets required for this role? + Experience in RTL coding, synthesis and/or SoC Integration + Experience in digital design Architecture + ... and/or a Chip Lead + Experience in RTL coding, synthesis and/or SoC Integration + Experience in...and Python (or similar) scripting experience + Experience in SoC integration and ASIC architecture Nice to… more
- Amazon (Sunnyvale, CA)
- …and Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis , Place & Route and other local/remote teams to address the design ... latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on...STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. - Full chip timing constraints development, full chip… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC 's and GPU's. This ... understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. + Exposure to Digital systems and VLSI design,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in raising ... plans for NVIDIA's next generation of CPU, GPU or SOC designs. + Owning STA of large subsystems and...or at block-level with additional responsibilities for block level synthesis /optimization + You will be responsible for all aspects… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... of ASIC design flow including RTL design, verification, logic synthesis , timing analysis, ECO, and post silicon debug. + Strong interpersonal skills… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Engineer, Timing to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... including clock domain crossing checks and MTBF analysis, logic synthesis , netlist quality checks, etc. + Help in all...MS (or equivalent experience) with 2+ years' experience in ASIC Design and Timing + Great understanding of timing… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of ... SOC clocking. The team collaborates with the front end...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency...members, we deliver clock information to GPU, CPU and SOC verification team, timing and DFT teams. You will… more
- NVIDIA (Santa Clara, CA)
- …computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip ( SOC ) group is looking for a top ASIC Engineer with a curiosity ... Are you looking for a SOC Design Engineer opportunity? If yes, come and...GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design, CAD, Package Design, Software, DFT and… more
- SpaceX (Sunnyvale, CA)
- …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual ... Sr . DDR IP Design Engineer (Silicon Engineering) at...cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more
- NVIDIA (Santa Clara, CA)
- …prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. + Improve performance of the prototype, analyze ... + Experience in backend flows of FPGA Prototyping - Synthesis , P&R and Timing closure, with emphasis on Synopsys...or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to design and verify ... the world's leading SoC 's and GPU's. This position offers the opportunity to...micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Support post-silicon validation activities working… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, design ... and verify the world's leading SoC 's and GPU's. This position offers the opportunity to...with architects, other designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams to accomplish your tasks.… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA chips push the industry limits of technology and performance for GPU, CPU and SoC markets. What you'll be doing: + Evaluate new EDA tools and features and ... to provide methodology insights. + Act as liaison between ASIC designers and EDA vendors. What we need to...Stand Out from the Crowd: + Hands-on experience with synthesis and Logical Equivalence Checking. + Strong interpersonal and… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Senior Logic and Digital Circuit Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... as one of the key IPs in many complex SoC . You'll work closely with analog designers and system...creations. Next is to define and build constraints for synthesis and drive for timing closure. In addition to… more
- Siemens Digital Industries Software (Fremont, CA)
- …a plus. + Working knowledge of IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL ... chip, board and system design. **Job Overview** Siemens EDA is seeking a senior level, self-starting, motivated, and high performing individual for an opportunity to… more