• Sr ASIC Modem design Engineer

    Amazon (Austin, TX)
    …at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop ... in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level...models in MATLAB. - Involve in control plane logic design and interfaces to bus fabrics. - Explore and… more
    Amazon (09/03/24)
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  • ASIC Engineer , Implementation

    Meta (Austin, TX)
    …Area. 14. Knowledge of front-end and back-end ASIC tools. 15. Experience with RTL design using SystemVerilog or other HDL. 16. Experience managing multiple ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using… more
    Meta (07/18/24)
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  • ASIC Design Engineer

    Amazon (Austin, TX)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... signal routing - As a key member of the ASIC design team, you will implement and...related technical field - 5+ years of experience in RTL design for SOC - 5+ years… more
    Amazon (07/25/24)
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  • CPU RTL Power Engineer

    Qualcomm (Austin, TX)
    RTL power modeling and estimation experience. * Deep understanding of CPU or ASIC low power design including expertise in active and Idle power optimization, ... fast-paced and dynamic environment **Roles and Responsibilities** As an RTL Power engineer you will own and/or...tool) and optimize power at various stages of the design to meet targets working with architecture, RTL more
    Qualcomm (06/13/24)
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  • ASIC Design Verification…

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Design Verification Engineer Responsibilities:...scratch. 10. Experience debugging fails to the line of RTL , closing out bug fixes, using Verdi or equivalent… more
    Meta (07/18/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
    Meta (07/18/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
    Meta (09/06/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development 2. RTL development using ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...one of these skills (minimum 3 years): Micro-architecture and RTL development for complex control and data path IPs,… more
    Meta (07/20/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
    Meta (07/18/24)
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  • Sr. ASIC Design Verification…

    Amazon (Austin, TX)
    …a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models . Develop detailed test plans and write tests, ... using test benches, which can be reused for the ASIC implementation . Run formal verification of complex blocks...blocks to ensure functional correctness . Work with the design and communication systems team and participate in system… more
    Amazon (08/14/24)
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  • SoC Modeling ASIC Engineer

    Meta (Austin, TX)
    …through architecture, to firmware, and algorithms.We are seeking an SoC Modeling ASIC Engineer to support C++/Python modeling and software interfaces of ... pipelines to the dedicated hardware accelerators. **Required Skills:** SoC Modeling ASIC Engineer Responsibilities: 1. Analyze the software pipelines and… more
    Meta (08/07/24)
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  • ASIC Design Engineer

    Amazon (Austin, TX)
    …and area for significant IPs early in design cycle - Execute on design specifications to deliver high quality RTL - Ensure quality by running and ... tracking results of front-end tools including: Synthesis, Lint ( RTL , DFT, UPF), Power Analysis and STA - Work...equivalent experience - 5+ years of experience in digital design - Experience with products that have gone to… more
    Amazon (09/04/24)
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  • Senior Principal Electrical Engineer

    Renesas (Austin, TX)
    RTL Design :** Fluent in Verilog/SystemVerilog RTL for digital CMOS circuit design . + ** ASIC Methodology:** Strong understanding of ASIC design ... Senior Principal Electrical Engineer Job Description The Performance Computing Power (PCP)...Develop detailed specifications for execution by medium-to-large teams. + ** RTL Design :** Lead and oversee digital … more
    Renesas (08/14/24)
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  • Physical Design Engineer , Annapurna…

    Amazon (Austin, TX)
    …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... - BS + 4yrs or MS + 3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from - RTL -to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block … more
    Amazon (08/02/24)
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  • NoC Interconnect Design Engineer

    Qualcomm (Austin, TX)
    …Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR ... from early product specification and analysis effort to final RTL delivery to the SoCs. One aspect of the...Science, Engineering, or related field and 1+ year of ASIC design , verification, validation, integration, or related… more
    Qualcomm (08/06/24)
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  • CPU Physical Design Timing Engineer

    Qualcomm (Austin, TX)
    Design Timing Engineer , you will work with microarchitecture and RTL design team to develop timing constraints, drive implementation of the designs ... automation using TCL/Perl/Python. + Familiar with digital flow design implementation RTL to GDS : ICC,...Layout Parasitic Extraction, feed through handling, + Knowledge of ASIC back-end design flows and methods and… more
    Qualcomm (06/27/24)
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  • Digital Design Engineer

    Meta (Austin, TX)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... our industry leading virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block… more
    Meta (07/26/24)
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  • Sr Principle Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …in the technology industry. This position is for a synthesis and design engineer . Responsibilities + Develop/improve highly automated and customizable synthesis ... method practices to enable better synthesis convergence. + RTL /logic design skills as well as physical...skills for timing closure. + Closely collaborate with the ASIC design team to drive architectural feasibility… more
    Cadence Design Systems, Inc. (09/05/24)
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  • IC Physical Design Flow, Principal…

    Cadence Design Systems, Inc. (Austin, TX)
    …related experience in design and EDA (Digital Implementation/Signoff) + Understands ASIC Design implementation process and steps + Strong hands-on experience ... (Innovus, ICC2, Fusion Compiler) + Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler) + Experience with EDA tools in the IC digital… more
    Cadence Design Systems, Inc. (07/06/24)
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  • Silicon Prototyping Emulation Engineer

    Meta (Austin, TX)
    …comfortable working complex SoC devices, emulation flows, virtualized sensors, displays, RTL design /verification, CV/ML/Gfx algorithms, OS/RTOS kernel and driver ... and content. Meta Reality Labs team seeks Silicon prototyping Emulation engineer .Our End-to-End (E2E) pre-silicon team enables this testing by creating systems… more
    Meta (08/22/24)
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