- Actalent (Houston, TX)
- Job Title: FPGA Verification Engineer -...update the plan as needed. + Evaluate current FW UVM test bench environment for verification and ... verification and update the VCRM based on baselined FPGA requirements. + Evaluate current FW test methods for...test benches, tests, virtual sequences, UVCs, UVC User Guides, UVM Test diagrams, and test bench scripts. + Develop… more
- BAE Systems (Austin, TX)
- …Other incentives may be available based on position level and/or job specifics. **Design Verification Engineer - FPGA - (Sign-on Bonus)** **103355BR** EEO ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan,...SystemVerilog/ UVM , OVM, and/or VHDL + Experience with FPGA /ASIC design and verification tools (Mentor Questa… more
- Meta (Austin, TX)
- …assets and assistance to explore faster. **Required Skills:** Silicon Prototyping FPGA Engineer Responsibilities: 1. Own IP/SoC pre-silicon deployment efforts ... hardware, software, and content. Facebook Reality Labs team seeks a Silicon Prototyping ( FPGA ) Engineer . Our End-to-End (E2E) proto team enables this testing by… more
- Butler America (Grand Prairie, TX)
- ASIC & FPGA Design Engineer Location: Grand Prairie, TX Job ID: #68105 Pay Range: $83-96 ph (W2) Duration: 6 - 12 mos Active Secret Clearance needed Develops, ... and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays ( FPGA ) development. Determines architecture design, logic… more
- Verilab (Dallas, TX)
- …Computer Engineering, or Computer Science. + 7 years of project-proven verification experience. + Experienced SystemVerilog/ UVM developer: + Block and ... a similar level. + C/C++ developing, or integrating, reference models into SystemVerilog/ UVM environments. + Formal Verification : Formal Property Verification… more
- Amazon (Austin, TX)
- … verification , preferably in areas of image processing. - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - Strong ... silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a...TCL) - 6+ years experience in System Verilog or UVM Preferred Qualifications - Master's or PH.D in Computer… more
- Renesas (Austin, TX)
- …and optimization. + **Advanced Verification :** Familiarity with advanced verification methodologies ( UVM ). + **Industry-Standard Protocols:** Experience with ... Senior Principal Electrical Engineer Job Description The Performance Computing Power (PCP)...Perform timing analysis, LINT, CDC, RDC, and UPF. + ** Verification :** Work closely with analog and digital verification… more
- Meta (Austin, TX)
- **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design ... virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more