• Senior System Verilog

    IBM (Houston, TX)
    …requirements analysis, design , code development, verification, integration and performance targets * Design System Verilog code and integrate IP into the ... design and verification for their blocks and the system . Come join the premiere NAND flash controller development...and Professional Expertise * 5+ years of Experience with Verilog and/or System Verilog development… more
    IBM (09/28/24)
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  • Senior Principal Design Engineer…

    Cadence Design Systems, Inc. (Austin, TX)
    …in system reference designs. This Systems CAE will use advanced system design tools to integrate and validate reference designs using compute, memory, ... integration. + Develop examples and best practices for SoC system design , verification, and testbenches for CSG...(JTAG, CoreSight). + Proficient in writing and debugging RTL ( Verilog , System Verilog ). + Experience… more
    Cadence Design Systems, Inc. (10/08/24)
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  • Digital Design Engineer

    Skyworks (Austin, TX)
    …+ + Digital design specification, design , analysis, and HDL ( Verilog / System Verilog ) coding + Behavioral modeling of analog and mixed ... static timing, scan insertion, etc. + Verification of digital sub- systems , mixed-signal sub- systems , and the entire chip...design specification, design , analysis, and HDL ( Verilog / System Verilog ) coding + Behavioral… more
    Skyworks (11/07/24)
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  • Hardware (CPU, GPU, SoC, Digital Design

    Qualcomm (Austin, TX)
    …models for power/performance) + Graphics power analysis & optimization (Vulkan) + C, Perl, Verilog , System Verilog , C++, Python **_CPU_** + Validation of ... MAC layer processing + Development of verification components using System Verilog and UVM + Participating in...Understanding of power and performance tradeoffs + Knowledge of system -level design and architecture + Machine Learning… more
    Qualcomm (08/20/24)
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  • Senior FPGA Digital Design Engineer

    BAE Systems (Austin, TX)
    …Clearance (Secret), or eligible to obtain one + Experience in FPGA (preferred) or ASIC Design / Development + VHDL (preferred) or Verilog HDL coding + Experience ... **Job Description** BAE Systems has an open position for a Senior...Experience with clock domain crossing techniques + Experience with designer -level test bench (VHDL, Verilog , or SystemVerilog)… more
    BAE Systems (10/30/24)
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  • Design Verification Engineer - Custom Power…

    Texas Instruments (Dallas, TX)
    …related field + 5 years of Analog Mixed Signal verification experience utilizing System Verilog **Preferred qualifications:** + Experience using Verilog , ... company on projects for TI's largest customers. You will work closely with design , systems , characterization, test and product engineers to define, develop, and… more
    Texas Instruments (11/06/24)
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  • Senior ARM RTL Design - Architect

    Cadence Design Systems, Inc. (Austin, TX)
    …technology. Cadence Solutions (North America) team is looking for an experienced RTL designer to contribute to architecture and design for next generation SoCs ... : + CPU IP selection/configuration/integration for ARM and/or RISCV CPU and System IP + Design IP selection/configuration/integration for Memory and/or Interface… more
    Cadence Design Systems, Inc. (09/17/24)
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  • Principal Design Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …testbench creation and generation + Automatic Model generation and testing + Cadence Design Systems AMS simulation flows + Mixed-Signal Assertions and Checkers + ... make an impact on the world of technology. Principal Design Engineer At Cadence, we hire and develop leaders...constraints. + Knowledge of multiple programming languages. C++, Python, System Verilog , and e (verification language) are… more
    Cadence Design Systems, Inc. (10/04/24)
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  • Staff Digital Design Engineer

    Skyworks (Austin, TX)
    …+ Digital design specification, design , analysis, and HDL ( Verilog / System Verilog ) coding + Detailed documentation, test vector development, ... Candidate will be involved in all aspects of the design process from system conceptualization to mass... systems (eg SVN, SOS) Working knowledge of System Verilog and/or UVM Experience leading a… more
    Skyworks (10/15/24)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    …Engineer, Design Responsibilities: 1. Micro-architecture development. 2. RTL development using Verilog , System Verilog and HLS. 3. Lint, CDC, Synthesis, ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...3+ years of silicon development experience. 8. Experience with Verilog or System Verilog . 9.… more
    Meta (10/12/24)
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  • Senior Principal FPGA Design Engineer

    BAE Systems (Austin, TX)
    **Job Description** BAE Systems is seeking a Senior Principal FPGA Design Engineer! See what you re missing. Our employees work on the world s most advanced ... a part of? Come build your career with BAE Systems . At BAE Systems , we deliver a...one + Significant experience in FPGA (preferred) or ASIC Design / Development + VHDL (preferred) or Verilog more
    BAE Systems (10/30/24)
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  • ASIC Design Verification Engineer Intern,…

    Amazon (Austin, TX)
    …conferral date between December 2025 and September 2026 - Programming experience in System Verilog or UVM Preferred Qualifications - Enrolled in a Master's ... for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we… more
    Amazon (10/04/24)
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  • Digital Design - Summer Intern

    Skyworks (Austin, TX)
    …Responsibilities + Digital design specification, design , analysis, and HDL ( Verilog / System Verilog ) coding + Behavioral modeling of analog and ... and will be involved in all aspects of the design process from system conceptualization to mass...static timing, scan insertion, etc. + Verification of digital sub- systems , mixed-signal sub- systems , and the entire chip… more
    Skyworks (09/20/24)
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  • Senior Logic Design Engineer

    Microsoft Corporation (Austin, TX)
    …logic design including microarchitecture specification development, RTL coding in Verilog / System Verilog , design verification collaboration, and ... team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to...reality. We are looking for a ** Senior Logic Design Engineer** to work in the dynamic Microsoft Artificial… more
    Microsoft Corporation (11/08/24)
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  • Principal Design Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …MSEE and minimum of 5 years of experience required + Background in RTL design including Verilog , synthesis, lint, formal + Strong communication skills + ... Architect solutions for the latest DDR controller features and customer requirements + Design RTL in a highly configurable and automated environment + Work in small… more
    Cadence Design Systems, Inc. (10/01/24)
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  • GPU Design Verification Lead

    Qualcomm (Austin, TX)
    …+ Verification skills: Test planning, Scripting, Simulation, problem solving and debug. + System Verilog , UVM, Verilog or VHDL, C/C++ skills required. ... field and 6+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR Master's degree...+ Constrained random, Functional Coverage development, design debug experience required. + Deep exposure to CPU… more
    Qualcomm (10/15/24)
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  • ASIC Engineer Intern, Design

    Meta (Austin, TX)
    …degree in Electrical Engineering, Computer Engineering or related engineering fields 7. Knowledge of Verilog or System Verilog or HLS 8. Knowledge of ... **Summary:** Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization....efficiently. You will have an opportunity to participate in design and verification of advanced IPs using state of… more
    Meta (11/02/24)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    … Responsibilities: 1. Architecture exploration. 2. Micro-architecture development. 3. RTL development using Verilog , System Verilog and HLS. 4. Soft and hard ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...debug. 5. Collaboration with implementation team to close the design on timing and power. **Minimum Qualifications:** Minimum Qualifications:… more
    Meta (09/06/24)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    … Responsibilities: 1. Architecture exploration 2. Micro-architecture development 3. RTL development using Verilog , System Verilog and HLS 4. Soft and hard ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...debug 6. Collaboration with implementation team to close the design on timing and power **Minimum Qualifications:** Minimum Qualifications:… more
    Meta (10/04/24)
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  • Dmts RF/mmWave Design Engineering

    Global Foundries (Richardson, TX)
    GLOBALFOUNDRIES is a seasoned DMTS, RF/mmWave IC Design engineer to design Transmitter, Receiver and VCO/PLL sub- systems which include critical blocks such ... the role to understand industry requirements and emerging communication systems standards. You will design while utilizing...Office + Mixed Signal modeling of PLL and/or transceiver sub- system using Verilog AMS + Minimal Travel… more
    Global Foundries (10/01/24)
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