- Meta (Sunnyvale, CA)
- … DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and… more
- Broadcom (San Jose, CA)
- …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead… more
- Qualcomm (Santa Clara, CA)
- …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... in digital ASIC design; experience using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 5+ years of practical experience with test or DFT … more
- Broadcom (San Jose, CA)
- …switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. . You ... you apply.** **Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most… more
- Siemens (Fremont, CA)
- …or BSCS required; MSEE desired * 3 to 8 years of experience as an Applications Engineer , ASIC Design Engineer or related field * Digital design experience ... * Proven track record of Design for Test for ASIC design * Demonstrated knowledge of Tcl language and...products * Ideal candidate has experience with Siemens Tessent DFT products * Simulation and verification expertise * Project… more
- Meta (Sunnyvale, CA)
- …entire Silicon Lifecycle, to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Characterization team, you will be ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer - Infra Silicon Characterization Responsibilities: 1. Work across… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- Cisco (San Jose, CA)
- …service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon ... breadth of growth opportunities that working in a smaller ASIC team can provide. You will work with exceptional...customer shipments. Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....with the Designers to create waivers. 6. Perform RTL DFT Analysis and improve the DFT coverage… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....with the Designers to create waivers. 6. Perform RTL DFT Analysis and improve the DFT coverage… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....with the Designers to create waivers. 4. Perform RTL DFT Analysis and improve the DFT coverage… more
- Kelly Services (Milpitas, CA)
- **Front-End ASIC Design Engineer Milpitas, CA** **$150,000 to $200,000 Annually** **Job Description** A new, innovative enterprise that designs, develops and ... lead its product development and sales activities. We are seeking a Front-End SoC/ ASIC Design Engineer for our SoC business unit. **Responsibilities Include but… more
- Cisco (San Jose, CA)
- …industry. Who You'll Work With You will work with outstanding talent and vast ASIC development expertise in design, DV, DFT , physical design, and post-silicon ... a system company, so you can also use the ASIC to work with the System and Software teams...What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. *… more
- Cisco (San Jose, CA)
- …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing Constraints ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....Full chip Flat & Hierarchical Constraints for Functional & DFT Modes. 4. Perform STA for full chip and… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/ DFT signal routing - As a key member of...signal routing - As a key member of the ASIC design team, you will implement and deliver high… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...+ You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT ,… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... flow. + Strong hands-on debugging capability and problem-solving skills. + Background in DFT timing closure for various modes eg scan shift and capture, transition… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... + Understanding of high-speed clock distribution and planning as well as impact of DFT logic in timing convergence. + Knowledge of circuits and SPICE, as well as… more