- Qualcomm (Santa Clara, CA)
- …> CPU Engineering **General Summary:** We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. In this ... in Computer or Electrical Engineering with **10+ years** of CPU RTL or similar experience. * Thorough...as Perl or Python. **Roles and Responsibilities** As an RTL engineer you will own or participate… more
- Google (Mountain View, CA)
- …more about benefits at Google (https://careers.google.com/benefits/) . + Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design ... practical experience. + Experience with digital logic design principles, RTL design concepts, and use of Verilog or SystemVerilog....or industry experience. + Knowledge of general purpose operating systems such as Linux or Android. + Knowledge of… more
- Qualcomm (Santa Clara, CA)
- …to help create a smarter, connected future for all. As a Qualcomm CPU Architecture Engineer , you will architect and design state-of-the-art CPUs that ... in productizing them. We are looking for an experienced engineer for CPU performance modeling and exploration....internals and compiler technology a plus + Collaborate with CPU Performance Architecture and RTL team members… more
- Qualcomm (Santa Clara, CA)
- …Power/Performance Modeling targeted for high performance, low power devices. As a CPU Power/Performance Modeling Engineer , you will contribute ideas for advanced ... Understanding of power consumption and estimating power as proxy. + Collaborate with CPU Performance Architecture and RTL team members to identify opportunities… more
- Qualcomm (Santa Clara, CA)
- …and validate high performance CPUs. **Role and Responsibilities** + Work closely with CPU RTL , performance, verification and SW teams to deliver emulation-based ... > CPU Engineering **General Summary:** As a CPU Emulation Engineer , you will work as...4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree… more
- Qualcomm (Santa Clara, CA)
- …digital transformation to help create a smarter, connected future for all. As a Qualcomm CPU Engineer , you will lead innovative Central Processing Unit ( CPU ) ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a leading technology innovator, Qualcomm… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group > CPU Engineering **General Summary:** As a DV Infrastructure Engineer focusing on the methodology and support of RTL design verification, ... optimizing tools. Roles/Responsibilities: + Develop and maintain flows, scripts and systems around the RTL and Verification development work cycle like RTL … more
- Qualcomm (Santa Clara, CA)
- …Group > CPU Engineering **General Summary:** As a Physical Design Clock Engineer , you will work with microarchitecture, RTL design, CAD, block level and ... and Responsibilities** + Work with design teams to understand, implement and validate CPU clocking. + Drive overall clock generation and distribution methodology of … more
- Qualcomm (Santa Clara, CA)
- …the design team in productizing them. We are looking for an experienced engineer for CPU performance modeling and exploration. **Roles and Responsibilities** + ... internals and compiler technology a plus + Collaborate with CPU Performance Architecture and RTL team members...Computer Science, or related field and 10+ years of Systems Engineering or related work experience. OR + Master's… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Performance Modeling Engineer Location - US (prefer - San Jose) Summary Chiplet-based system design is an ... trend in semiconductor technology, offering a new paradigm for building complex systems -on-chip (SoCs). Cadence is at the forefront of this innovation, unveiling the… more
- Vector Atomic (Pleasanton, CA)
- …algorithms for precision sensors. The work will include implementations in both CPUs and RTL -based FPGA systems . + Work with various simulation tools to define ... develop implementations that meet system-level requirements in limited-resource embedded systems . Assist with the translation into RTL ...define digital algorithms that can be coded on hardware systems such as FPGAs and CPU -based firmware.… more
- Amazon (Sunnyvale, CA)
- …drive system architecture across Amazon devices. Key job responsibilities As an SOC Systems Engineer , you will be contribute to defining the system architecture ... decisions such as edge-cloud compute partition, device SoC selection, compute architecture ( CPU , DSP, GPU and ML accelerators), and other system component selections… more
- Qualcomm (Santa Clara, CA)
- …will be responsible to develop technical specifications from Architectural and systems requirements and deliver detailed low power micro-architecture and design. ... their design through the full ASIC development process from specification, RTL implementation, verification, synthesis, timing closure, emulation and post silicon… more
- Belcan (Palo Alto, CA)
- Sr. Physical Design Engineer Job Number: 354330 Category: Design Engineering Description: Job Title: Sr. Physical Design Engineer Pay rate: $66.34 /hr. Location: ... #PaloAltoJobs; #PhysicalDesignEngineerjobs; Job Description: As a Sr. physical design engineer , you will contribute to all design phases of...chip levels, as well as the full-chip level from RTL to GDSII. You will collaborate with the Foundry… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be part of a ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Develop functional tests based on… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G ... advanced Digital IP's spanning Neural IP, Network on Chip, CPU Cores & DSP, and Vision Cores. The intern...MS or PhD level program enrollment + Background in RTL design including Verilog, synthesis, lint, formal. + Strong… more
- Amazon (Cupertino, CA)
- …Be Curious" mindset - Have familiarity with accelerator design, interconnects, DMAs, Memory sub- systems , CPU cores, SIMDs, debug and system level architectures - ... and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area and power-efficient … more
- NVIDIA (Santa Clara, CA)
- …chip design ! NVIDIA is seeking a passionate, highly motivated, and creative senior software engineer to be part of its CPU SOC Infrastructure team. We develop ... We are now looking for a Senior Infrastructure Engineer ! NVIDIA is looking to tap onto AI...and craft tools to streamline the design/verification of NVIDIA's CPU , memory and SOC designs. This position offers the… more
- MetaOption, LLC (Milpitas, CA)
- Sr. Front-End ASIC Design Engineer Candidate needs SoC/ASIC experience working hands on currently, with non-off the shelf designs. - Compute (ie, CPUs), memory (HBM, ... etc.) are useful experience. Description We are seeking a Front-End SoC/ASIC Design Engineer for our SoC business unit. Responsibilities Include but are not Limited… more
- Kelly Services (Milpitas, CA)
- **Front-End ASIC Design Engineer Milpitas, CA** **$150,000 to $200,000 Annually** **Job Description** A new, innovative enterprise that designs, develops and ... development and sales activities. We are seeking a Front-End SoC/ASIC Design Engineer for our SoC business unit. **Responsibilities Include but are not Limited… more