• ASIC Engineer , Power

    Meta (Sunnyvale, CA)
    …build efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Power Responsibilities: 1. Define the power ... **Summary:** Meta is hiring ASIC Power Engineers within our Infrastructure organization to work on low level power designs. We are looking for individuals… more
    Meta (05/31/24)
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  • Senior ASIC Power Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on ... are expected to understand the design and implementation, develop power metrics and drive power reductions +...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (05/30/24)
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  • Core Engineering - Design Engineer V

    US Tech Solutions (Sunnyvale, CA)
    Job Description: Role: ASIC Power Engineer DUTIES ASIC Power Engineer to perform power analysis and optimizations in ASIC for Meta's ... document and communicate clearly MINIMUM QUALIFICATIONS 10+ Years of experience as an ASIC Power engineer , or CAD Engineer /Physical Design engineer more
    US Tech Solutions (06/13/24)
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  • Power Electronic Research Engineer

    Ford Motor Company (Dearborn, MI)
    ** Power Electronic Research Engineer - LV circuit and ASIC design and layout** We are the movers of the world and the makers of the future. We get up every ... what it means to drive a Ford. A research engineer position working on design and layout of LV...drive applications. + Design and develop LV isolated converter power supply and LV power distribution ICs… more
    Ford Motor Company (06/06/24)
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  • ASIC and/or FPGA Design & Verification…

    The Boeing Company (El Segundo, CA)
    …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will lead ... determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC ...Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC with latest design practices and tools from block-level… more
    The Boeing Company (06/28/24)
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  • ASIC and/or FPGA Project Lead…

    The Boeing Company (Huntington Beach, CA)
    …with us. Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for an ** ASIC /FPGA Project Lead Engineer ** to join us as part of our Boeing ... Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Project Lead Engineer on the Boeing...determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Responsible for cost, schedule,… more
    The Boeing Company (06/27/24)
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  • Sr. SOC/ ASIC Physical Design…

    SpaceX (Redmond, WA)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (05/17/24)
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  • Sr. FPGA/ ASIC Design Engineer

    SpaceX (Sunnyvale, CA)
    Sr. FPGA/ ASIC Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SR. FPGA/ ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...to solve complex problems including clock domain crossings and power optimization + ASIC /SoC system integration experience… more
    SpaceX (05/17/24)
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  • ASIC Engineer , Machine Learning…

    Meta (Menlo Park, CA)
    **Summary:** Meta Platforms Inc. is seeking an ASIC Engineer , Architecture to join our Infrastructure organization. This organization is responsible for building ... expert engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Machine Learning Architecture (PhD) Responsibilities: 1.… more
    Meta (06/11/24)
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  • Senior ASIC Design Engineer

    SLAC National Accelerator Laboratory (Menlo Park, CA)
    Senior ASIC Design Engineer Job ID 5971 Location SLAC - Menlo Park, CA Full-Time Regular **SLAC Job Postings** **Position Overview:** SLAC National Accelerator ... Laboratory seeks a Senior Application Specific Integrated Circuit ( ASIC ) design engineer within the Integrated Circuits Department of the Instrumentation… more
    SLAC National Accelerator Laboratory (06/12/24)
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  • Senior ASIC Floorplan Design…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... chip development. + Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities +… more
    NVIDIA (06/26/24)
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  • Machine Learning ASIC Engineer

    Meta (Sunnyvale, CA)
    **Summary:** Meta is seeking an ASIC Engineer , Architecture to join our Infrastructure organization. Our servers and data centers are the foundation upon which ... to build "Green" data center accelerators. **Required Skills:** Machine Learning ASIC Engineer , Architecture Responsibilities: 1. Work on developing Data… more
    Meta (06/06/24)
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  • ASIC Verification Engineer

    Cisco (San Jose, CA)
    …You'll Work With You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with ... functional coverage Who You Are * You are an ASIC Design Verification Engineer with 5+ years...work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How… more
    Cisco (04/21/24)
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  • ASIC /SoC System Level Test Engineer

    Google (Sunnyvale, CA)
    …with hardware or semiconductor testing. + Experience implementing secure ASIC /SoC manufacturing solutions (eg, provisioning, e-fuse programming, or lifecycle ... management). + Experience in C#, .NET Framework, C/C++, or Perl. + Knowledge of ASIC /SoC boot process or CPU performance testing. Be part of a diverse team that… more
    Google (06/27/24)
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  • Sr. ASIC Design Engineer , DDR IP…

    SpaceX (Irvine, CA)
    Sr. ASIC Design Engineer , DDR IP (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... make this possible, with the ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER , DDR IP (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (06/28/24)
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  • Sr. Advanced ASIC Design Engineer

    Honeywell (Plymouth, MN)
    …complex Integrated Circuit (IC) products within Honeywell Aerospace. As a Sr. Advanced ASIC Design Engineer , you will be responsible for providing customer ... - Lead efforts to map customer designs into Honeywell's ASIC technology - Define timing constraints for IC designs...For Test (DFT), physical synthesis, static timing analysis, and/or power analysis - Direct experience with Synopsys toolset (ICC2,… more
    Honeywell (05/09/24)
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  • Sr. ASIC Physical Design Methodology/CAD…

    SpaceX (Irvine, CA)
    …in either Sunnyvale, CA or Irvine, CA COMPENSATION AND BENEFITS: Pay range: ASIC Engineer /Senior: $160,000.00 - $220,000.00/per year Your actual level and base ... Sr. ASIC Physical Design Methodology/CAD Engineer (Silicon...solutions PREFERRED SKILLS AND EXPERIENCE: + Experience in high-performance, low- power physical design, and implementation techniques with industry standard… more
    SpaceX (06/13/24)
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  • ASIC Design Engineer

    Cisco (San Jose, CA)
    …service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon ... breadth of growth opportunities that working in a smaller ASIC team can provide. What You'll Do * You...* Implement Verilog RTL to meet timing, performance, and power requirements * Contribute to full chip integration and… more
    Cisco (05/29/24)
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  • ASIC Engineer , Implementation

    Meta (Austin, TX)
    …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....and generate optimized Gate Level Netlist for Timing, Area, Power . Debug the timing/area/congestion issues and work with RTL… more
    Meta (06/05/24)
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  • ASIC Design Engineer (Security…

    Qualcomm (San Diego, CA)
    …solutions and products are elegantly engineered for optimal performance and power consumption. Our system-on-chip solutions like Snapdragon bring together CPU, GPU, ... product aspects. **Requirements** + 5+ years of experience in ASIC design + Preferred experience with security designs and...test + Experience with High-speed, Low Area, and Low Power architectures + Experience in verification and modeling is… more
    Qualcomm (06/07/24)
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