• ASIC Package Signal

    Cisco (San Jose, CA)
    power , speed, and fabrication / assembly technology. You will drive ASIC package power and signal integrity rules and layout analysis to enable ... ASIC team is looking for an expert in Signal and Power Integrity to help us... Integrity to help us develop our next generation ASIC packaging . You will work on cutting-edge… more
    Cisco (01/07/25)
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  • Power Electronic Research Engineer - LV…

    Ford Motor Company (Dearborn, MI)
    ** Power Electronic Research Engineer - LV circuit and ASIC design and layout** We are the movers of the world and the makers of the future. We get up every day, ... and high temperature circuit design, to integrate filtering solutions with power semiconductor packaging . + Understanding automotive applications and… more
    Ford Motor Company (12/05/24)
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  • ASIC Validation Engineer - DC to RF mmW…

    Fortive Corporation (Beaverton, OR)
    …using Vector Network Analyzers and similar equipment for RF and high-speed mixed signal circuit validation. * Strong understanding of ASIC design and ... The ASIC Validation Engineer plays a crucial role in...self-test to validate and characterize RF and high-speed mixed signal circuits. * Create and maintain validation documentation and… more
    Fortive Corporation (11/13/24)
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  • ASIC /FPGA Validation Engineer (Silicon…

    SpaceX (Redmond, WA)
    …(VSG), Vector Signal Analyzers (VSA), Spectrum Analyzers, load pulls, RF power meters, high-speed oscilloscopes, and other common lab equipment + Work closely ... ASIC /FPGA Validation Engineer (Silicon Engineering) at SpaceX Redmond,...up new silicon, often being the first engineer to power on chips for the very first time +… more
    SpaceX (12/09/24)
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  • Sr. SOC/ ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
    SpaceX (11/22/24)
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  • Senior ASIC Designer

    Western Digital (Roseville, CA)
    …physical design and related challenges, such as DFM (Design for Manufacturability), signal integrity, and power integrity. + Experience with scripting languages ... **Company Description** At Western Digital, our vision is to power global innovation and push the boundaries of technology...We are seeking a highly skilled and experienced Senior ASIC Designer to join our engineering team. The ideal… more
    Western Digital (11/16/24)
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  • ASIC Engineer II (Full Time) United States

    Cisco (San Jose, CA)
    …custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology. Our silicon is developed ... a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within...Relevant courses include Computer Architecture, Logic Design, VLSI, Programming, Signal and Power Integrity, and DFx. *… more
    Cisco (11/18/24)
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  • Assistant Professor - Electrical Engineering:…

    San Jose State University (San Jose, CA)
    signal processing, network and network security, mobile network, power electronics, energy systems, microprocessors and computer systems, embedded systems, ... Assistant Professor - Electrical Engineering: ASIC , SOC, AI/ML Hardware & Embedded Systems Design Apply now… more
    San Jose State University (11/21/24)
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  • SOC/ ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where ... possible, with the ultimate goal of enabling human life on Mars. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) At SpaceX we're… more
    SpaceX (11/20/24)
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  • ASIC Design Engineer, Cloud-Scale Machine…

    Amazon (Cupertino, CA)
    …to Global 500 companies trust our robust suite of products and services to power their businesses. Diverse Experiences AWS values diverse experiences. Even if you do ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (12/19/24)
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  • Senior ASIC CAD Engineer

    Fortive Corporation (Beaverton, OR)
    Job Title: Senior ASIC CAD Engineer Job Description: We are seeking an experienced and detail-oriented Senior CAD Engineer to join our team. The successful candidate ... Keysight, and more, to create, modify, and maintain an intuitive and automated ASIC design environment. This role will also require extensive knowledge of PDK… more
    Fortive Corporation (11/23/24)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …expertise in multiple disciplines including Floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and ... supervision. **Experience:** + Requires a minimum of 8 years of related ASIC implementation experience. + BS degree in Electrical Engineering or Computer Engineering… more
    Broadcom (11/11/24)
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  • Sr ASIC Modem design Engineer (RTL,Wireless…

    Amazon (Austin, TX)
    …at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary ... to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing...communication systems. . Experience in designing and implementing Digital Signal Processing (DSP) algorithms and systems in RTL. .… more
    Amazon (11/16/24)
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  • Microelectronics ASIC Design Engineer

    Leidos (Arlington, VA)
    …circuit design (schematic, layout), modeling & simulation of key circuit parameters ( power , speed, timing, signal integrity, thermal, reliability, etc.) + ... Chip-Scale Design: digital, RF and/or mixed signal device packaging design/layout (2D-3D, chiplet/UCIe), substrate/interposer design (HDI, HDBU, EMIB), chip… more
    Leidos (01/08/25)
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  • ASIC Digital Physical Design Engineer

    Broadcom (San Jose, CA)
    …Desired Qualifications: - Understanding of backend Cadence tools. - Deep understanding of Signal Integrity and Power Integrity for High Speed designs. - ... place and route. + Experience in developing and implementing Power -grid and high speed clock constraints and specification. +...of parasitic delays. + Understanding and experience of mixed signal environments is a must. + Candidates must be… more
    Broadcom (11/01/24)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    …MATLAB or similar tools. + Opportunity to work in a dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit. What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
    NVIDIA (12/11/24)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    …MATLAB or similar tools. + Opportunity to work in dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
    NVIDIA (12/06/24)
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  • Signal Integrity Engineer

    Cisco (San Jose, CA)
    …* Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs * Write signal integrity design guidelines, test plan, ... the definition and design of current and next generation ASIC , package , printed circuit board (PCB), and...signal integrity challenges on system high-speed interconnections, clock, power , etc. * Work closely with other hardware function… more
    Cisco (12/04/24)
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  • Analog/mixed- signal IC Design Engineer…

    Cisco (San Jose, CA)
    …* You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met. Who you'll work with: * You ... plus: Passive component design: inductors, -transformers, transmission-lines, etc. -Floorplanning ( power /ground, digital/analog signal routing, etc.) -Custom transistor… more
    Cisco (01/07/25)
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  • Signal Integrity Engineer

    Meta (Menlo Park, CA)
    Signal Integrity Engineer to join our Platform HW Interconnect team, focusing on Power Integrity and Signal Integrity for our MTIA (Meta Training Inference ... signaling (Ethernet and PCIE) 2. Collaborate closely with the packaging team to review and guide package ...verify the D2D interface on silicon interposer 3. Perform signal integrity and power integrity analysis for… more
    Meta (10/12/24)
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