- Silvus Technologies (Irvine, CA)
- …using Verilog and System-Verilog. + Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or ... OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer- Signal Processing_** who will report to the...+ Experience with wireless communication systems on FPGA or ASIC designs. WORKING CONDITIONS & PHYSICAL REQUIREMENTS… more
- Silvus Technologies (Irvine, CA)
- …+ Experience using MATLAB. + Experience with communication systems on FPGA or ASIC designs. WORKING CONDITIONS & PHYSICAL REQUIREMENTS + Office environment. + ... to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA/RTL Design Engineer_** who will report to the _Director of FPGA Engineering_ on the… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...ECOs including crosstalk and noise analysis. + Expertise in physical design and optimization eg, placement, routing,… more
- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, ... and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic...with Static Timing Analysis (STA) + Experience physical design and optimization eg, synthesis, floorplanning,… more
- Cisco (San Jose, CA)
- …teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this ... startup-style team. You'll collaborate with exceptional talent with deep ASIC design and development expertise. As part...oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing… more
- Northrop Grumman (Linthicum Heights, MD)
- …+ Work closely with design , verification, design -for-test and physical design teams to optimize the timing and improve design performance + ... maintain timing methodologies and flows for efficient timing analysis and closure + Conduct design ...of experience in the full product life cycle of ASIC Design **Preferred Qualifications:** + Master's Degree… more
- NVIDIA (Westford, MA)
- …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking ... in a technology-focused company. What you will be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at block… more
- Northrop Grumman (Jessup, MD)
- …Verilog, System Verilog or VHDL RTL + Circuit synthesis, formal verification, and static timing using state-of-the-art digital ASIC design tools + Developing ... advantages to the warfighter. We are seeking a front-end ASIC design engineer for design ...engineers for floor planning and clock tree constraints and timing closure. Automated place and route and physical… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- Northrop Grumman (Jessup, MD)
- …Proficient in backend ASIC design including synthesis and static timing analysis, place and route, physical verification (LVS/DRC) + Proficient with ... our mission! Northrop Grumman Mission Systems (NGMS) is seeking a Sr. Staff ASIC Physical Design Engineer to support our growing engineering team in advanced… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend ... (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer, Physical Design Responsibilities:...cross-functional teams, IP, and EDA vendors 11. Experience in physical design and timing closure… more
- Cisco (Maynard, MA)
- …or Electrical Engineering and 4+ years of related experience * Hands-on experience in ASIC physical design and implementation * Experience with floor ... ASIC team can provide. Your Impact As a Physical Design Engineer, you will play a...advanced semiconductor nodes. You will optimize floor planning and timing , analyze and improve backend design flows,… more
- ManpowerGroup (Phoenix, AZ)
- **Job Title: Physical Verification Engineer ( ASIC Design )** **Location: USA & Canada (Remote is OK, Phoenix or Ottawa preferred)** **Role Overview** As a ** ... Engineer** , you will be responsible for ensuring that ASIC layouts meet all foundry design rules...and compliance with foundry specifications. Working closely with layout, physical design , and CAD teams, you'll help… more
- Teledyne (Goleta, CA)
- …Responsibilities:** + Flow down and documentation of customer requirements + Perform digital design , timing design , and detailed digital simulations + ... on a team that wins. **Job Description** **Job Summary:** ASIC Digital Design Engineer: Oversees definition, ...+ Clock/Power optimization for low-power ASICs. + Perform Back-End Physical Design as needed + Floorplanning and… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER (SILICON ENGINEERING) At SpaceX… more
- Cisco (San Jose, CA)
- …teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco...oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and ... logic synthesis, netlist quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence, timing constraints generation… more
- NVIDIA (Santa Clara, CA)
- …CPU team, you'll be a liaison between Logic design and Physical design teams responsible for achieving timing , area, performance and power goals of the ... other related high-performance semiconductor designs. + Physical design expertise including hands-on synthesis experience, timing ...expertise is preferred as is a deep understanding of ASIC design flow including RTL design… more
