- Tech Providers Inc. (Cedar Rapids, IA)
- …6-15 years* Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration* Recommend new ... tools and practices for continuous improvement in the group's ASIC / FPGA design flow* Contribute to...work, planning activities, and reporting status Must have Skills:* RTL coding and simulation in VHDL/Veriog* Digital circuit architecture,… more
- Google (Madison, WI)
- …or PhD in Electrical Engineering or Computer Science. + 4 years of experience in digital/ ASIC design using SystemVerilog or RTL . + Experience in one or ... design architecture and microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC /SoC products...(DV) teams to create testplans for, verify, and debug design RTL . + Work with physical … more
- Google (Sunnyvale, CA)
- …Electrical Engineering, Computer Engineering, or a related field. + 8 years of experience in ASIC design . + Experience in one or more successful ASIC ... experience. + 5 years of industrial experience such as digital design using SystemVerilog RTL . + Experience applying engineering best practices (eg, code review,… more
- Amazon (Redmond, WA)
- …at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop ... in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level...models in MATLAB. - Involve in control plane logic design and interfaces to bus fabrics. - Explore and… more
- Actalent (West Menlo Park, CA)
- Silicon Digital Design / ASIC Engineer III (Fully...in future AR products. The successful candidate will own ASIC IP RTL implementation for IP blocks, ... testing, and support integration into larger SOC environments. Position: Silicon Digital Design Engineer Location: Remote Pay rate: $70-90/hour Duration: 12… more
- Google (San Diego, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... such as Display or Video Codecs. + Experience with ASIC design methodologies for clock domain checks...integration. In this role, you will be responsible for RTL design development of camera and machine… more
- BAE Systems (San Jose, CA)
- …be available based on position level and/or job specifics. **Senior Principal Front End ASIC Design Engineer (Hybrid)** **102613BR** EEO Career Site Equal ... designer who has strong proficiency in both + ASIC design - performing architecture design , RTL coding/simulation, timing closure at layout phase +… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... Integration. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power...Computer Science, or a related field. + Experience with ASIC design methodologies for clock domain checks,… more
- Meta (Sunnyvale, CA)
- …Area. 14. Knowledge of front-end and back-end ASIC tools. 15. Experience with RTL design using SystemVerilog or other HDL. 16. Experience managing multiple ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using… more
- NVIDIA (WA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis… more
- L3Harris (Camden, NJ)
- Job Title: Lead ASIC /FPGA VHDL Design Engineer Job Code: 15340 Job Location: Camden, NJ (relocation can be provided for those that qualify) Schedule: 9/80 ... Engineering Staff (SMES) will be part of the key ASIC /FPGA design team, responsible for the delivery...from system requirements and developing detailed architecture + Execute design ( RTL AND/OR HLS (C++ to … more
- SpaceX (Irvine, CA)
- Principal SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is ... ultimate goal of enabling human life on Mars. PRINCIPAL SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design … more
- SpaceX (Sunnyvale, CA)
- …impact on synthesis, physical design and timing closure + Deep understanding of ASIC design flow, top-down and bottom-up design methodologies + Knowledge ... Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In… more
- Amazon (Austin, TX)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... signal routing - As a key member of the ASIC design team, you will implement and...related technical field - 5+ years of experience in RTL design for SOC - 5+ years… more
- Qualcomm (Austin, TX)
- … RTL power modeling and estimation experience. * Deep understanding of CPU or ASIC low power design including expertise in active and Idle power optimization, ... fast-paced and dynamic environment **Roles and Responsibilities** As an RTL Power engineer you will own and/or...tool) and optimize power at various stages of the design to meet targets working with architecture, RTL… more
- NVIDIA (Santa Clara, CA)
- …+ 5 years of proven experience with tools and methodologies for ASIC design and verification. + Direct experience with RTL Linting EDA tools. + Proficiency ... world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation...to provide methodology insights. + Act as liaison between ASIC designers and EDA vendors. What we need to… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Design Verification Engineer Responsibilities:...scratch. 10. Experience debugging fails to the line of RTL , closing out bug fixes, using Verdi or equivalent… more
- Meta (Sunnyvale, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Cisco (San Jose, CA)
- …the lab. Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... or Master's degree in Electrical or Computer engineering. * 8+ years of ASIC Design experience. * Excellent Verilog/System Verilog programming skills. *… more
- NVIDIA (Santa Clara, CA)
- …flow experience + Hold a basic sense of verification methodology + Good understanding of ASIC design flow including RTL design , verification, logic ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design ...modules (Fuse, Strap, Floorsweep, In-silicon measurement, Reset, Sysctrl) + RTL design , synthesis, timing + Silicon bring-up… more
