- Qualcomm (San Diego, CA)
- …Inc. **Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing ... for STA timing sign off. + A timing Engineer should be able to understand...Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.… more
- Amazon (Austin, TX)
- …design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- Amazon (Austin, TX)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... signal routing - As a key member of the ASIC design team, you will implement and deliver high...requirements. - Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/ timing clean design with constraints. - Perform lint and… more
- Amazon (San Diego, CA)
- …both logic and physical synthesis flow for various technology nodes. * Work with the ASIC design and DFT teams to understand the design and create timing ... the best PPA for all blocks. * Lead the timing sign-off for the post P&R database. * Ensure...or equivalent experience. * 7+ years of experience in ASIC implementation, ie, synthesis, STA and working with P&R… more
- Amazon (San Diego, CA)
- …underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using ... in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing customer… more
- Amazon (Cupertino, CA)
- …of physical design: full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity analysis, and physical ... include: work safely and cooperatively with other employees, supervisors, and staff ; adhere to standards of excellence despite stressful conditions; communicate… more
- Amazon (San Diego, CA)
- …& the impact of DFT on the blocks . Perform initial synthesis & timing analysis . Assist verification team in unit verification including test plan development . ... include: work safely and cooperatively with other employees, supervisors, and staff ; adhere to standards of excellence despite stressful conditions; communicate… more
- Qualcomm (Santa Clara, CA)
- …degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree ... in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science,… more
- Northrop Grumman (Baltimore, MD)
- …best work of your career. We are looking for you to join our team as a Staff Digital Engineer (FPGA Design) based out of Linthicum, MD. This position will be on ... flow including RTL development, simulation, synthesis, place and route, constraints development, timing analysis and optimization technics + Ability to operate in a… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and...3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
- Broadcom (San Jose, CA)
- …a Candidate Account, please Sign-In before you apply.** **Job Description:** **R&D Staff Engineer ** The ideal candidate will have expertise in integrated-circuit ... **Job Description** + Provide design support for IP & ASIC to create robust designs in line with advanced...timing , physical verification signoff to make IP & ASIC designs robust + Perform WAT & yield analysis… more
- L3Harris (Camden, NJ)
- …with every other Friday off Job Description: Reporting to the Manager, Engineering ( ASIC /FPGA), the Senior Member of Engineering Staff (SMES) will be part ... Job Title: Senior Electrical Engineer (FPGA Design) Job Code: 19447 Job Location:...the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This… more
- Broadcom (San Jose, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** Broadcom ASIC product division is a leader in semiconductor innovation, delivering ... for AI, networking, HPC among many other applications. We are seeking a staff **Digital Front-End Designer** with deep expertise in RTL design, synthesis, and design… more
- Amazon (Sunnyvale, CA)
- …ATE Test Engineer , you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with ... test vectors on test platforms and optimize tester and vector parameters to ensure timing and repeatability. Work with ASIC design teams ensure the test… more
- BAE Systems (Endicott, NY)
- …(Training, overhead, etc) + Collaboratively work with peers and PRG/PTL Leads to Staff projects appropriately + Provide resources and tools required by team + Ensure ... and design tradeoffs + Experienced in all stages of FPGA and/or ASIC development including requirements management, RTL design, verification, synthesis, timing … more