- Nutanix (San Jose, CA)
- …and maintain software that monitors and governs hardware platform functionality, including power state management , memory RAS, PCIe error handling, and support ... methodologies. + Debug and resolve customer reported issues related to CPU and platform technologies. **What You Will Bring** + Bachelors/Masters in Computer… more
- Celestica (San Jose, CA)
- …the system requirements and contribute or lead the specification, design, and debug of complex power delivery systems for datacenter products. **Skills ... ensure alignment to requirements and assist in key risk management mitigations + Experience with high power ,... engineers, and SI engineers on constraints, components selection, power tree design, test plans, bring-up and debug… more
- Microsoft Corporation (Redmond, WA)
- …is preferred. + Familiarity with key technology domains: PCIe, memory subsystems, networking, power management , rack and remote device management . + ... functions. Responsibilities will include architecting and developing efficient test and debug frameworks for cutting edge technologies, building test and debug… more
- NVIDIA (Santa Clara, CA)
- …rapid issue resolution and product quality improvements. + Hands-on experience in system-level power management validation for CPU and GPU products Your ... designers, Silicon Solutions and AE teams to validate and characterize system's power management controllers of NVIDIA's datacenter modules. The ideal candidates… more
- Oracle (Burlington, MA)
- …high-impact hardware team working directly alongside experts in signal and power integrity, system validation, CAD, firmware, diagnostics, operations, and mechanical ... from initial concept and requirements through prototype design, hands-on lab bring-up, debug , validation, and transition to full mass production. As many of these… more
- Microsoft Corporation (Hillsboro, OR)
- …+ Functional: Core, PCIe, Memory Controller, Security, IO, Power Management , Coherency, Manageability, BIOS/Microcode development and debug , or Fuses + ... and guide integration of low-level functionality for boot flows, memory management , and interrupt handling. + **Technical Leadership & Mentorship** + Provide… more
- NVIDIA (Santa Clara, CA)
- …intelligence applications. Work closely with the GPU/Network Systems Engineering, Product management and Sales teams + Work as customer trusted advisor conducting ... regular technical customer meetings for product roadmap, cluster issues debug , feature discussions and introduction to new technology solutions + Build custom… more
- Microsoft Corporation (Redmond, WA)
- …is of paramount importance. To achieve this goal, the Hardware, Infrastructure Management , and Fundamentals Engineering (HIFE) team is instrumental in defining and ... Engineer to join the team. **Responsibilities** + Hands on debug in data center (onsite and virtual) + Develop...virtual) + Develop and implement a robust supplier quality management strategy to ensure the data center hardware is… more
- Oracle (Santa Clara, CA)
- …mix of hardware and software causes. + Experience with early stage bring-up and power -on, platform firmware debugging, prototype GPU & CPU complex and memory ... utilize leading edge technology to deliver record-breaking performance, simplified management , security, self-monitoring, diagnosis, as well as cost-saving efficiencies.… more
- Oracle (Santa Clara, CA)
- …programmable logic, and microcontroller technologies._ + _Experience with the control and power sequence of high-performance CPU processors, GPUs, DDR memory ... to work with our FPGA, electrical, mechanical, SI and power teams in Santa Clara, California!_ _Here is your...+ _Debug board problems with a focus on FPGA debug levels._ + _Work with various internal teams to… more
- Meta (Seattle, WA)
- …drivers and communication, silicon integration, and power and performance management and optimization efforts 4. Debug complex, system-level, multi-component ... the entire software stack 6. Analyze, design, develop, and debug firmware for a wide variety of devices, including...embedded systems at HW level 21. Experience with active power management or power optimizations… more
- NVIDIA (Santa Clara, CA)
- …and optimize SoC subsystems such as memory architecture, test infrastructure and power management . + Collaborate with RTL, verification, physical design, ... Strong understanding of SoC system fundamentals, including memory hierarchy, coherency, clocking, power domains, boot and reset, test, and debug methodologies. +… more
- Mercury Systems (Andover, MA)
- …contributor, you will serve as a key liaison between program management , system engineering, mechanical design, software, and manufacturing, working independently ... NVIDIA, TI and beyond + Interacting with architecture/system engineering, program/product management , CAD & SI, ME, FW/SW, purchasing, and Manufacturing Operations +… more
- NVIDIA (Santa Clara, CA)
- …Provider deployments. + Debug and troubleshoot NVIDIA GPU firmware issues, power management , performance, and thermal control problems for data center ... + Partner directly with CSPs to deliver technical solutions, co-develop & co- debug features and optimizations, and provide support during new product introductions.… more
- Insight Global (Nashville, TN)
- …and memory architectures for optimal performance Conduct signal integrity analysis, power distribution design, and thermal management Perform schematic capture, ... high-performance PCBs for embedded systems and consumer electronics Implement and debug inter-process communication protocols including SPI, UART, and I2C Integrate… more
- NVIDIA (Santa Clara, CA)
- …be doing: + Own Initial Power -On and Board Bring-Up: Lead the initial power -on and functional validation of compute trays ( CPU , GPU, NIC, storage including ... enterprise and cloud provider businesses. These platforms bring together the full power of NVIDIA GPUs, NVIDIA NVLink, NVIDIA Networking, NVIDIA Data Center CPUs,… more
- Amazon (Cupertino, CA)
- …mindset - Have familiarity with accelerator design, interconnects, DMAs, Memory sub-systems, CPU cores, SIMDs, debug and system level architectures - Have ... Design Engineer, you will: * Develop and implement high-performance, area and power -efficient RTL designs to meet project specifications and targets * Conduct… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …place and route tools (Physical Synthesis, PnR, CTS, Static Timing Analysis) + Debug and resolve complicated PPA, Low Power implementation and TAT issues. ... projects in areas such as 5G, IOT, automotive, advanced CPU , wireless, audio, image processing, AI, machine learning etc....areas: + Synthesis, DFT, Logical Equivalency Checking + Low Power Design Implementation, SDC Verification + Place and Route… more
- Microsoft Corporation (Redmond, WA)
- …Engineer with a strong background in driver development, firmware development, silicon power -on. You will be involved with all phases of product development, from ... of the team responsible for firmware development, including driver interface, power -on, initialization, protocol and feature development of low-level hardware. The… more
- Oracle (Seattle, WA)
- …Pivotal knowledge and experience should include: + hardware products including GPU, CPU , memory, storage, NICs, rack power systems, and network switches. ... plans. Support test implementation at various manufacturing sites. Detect, debug , and troubleshoot issues (hardware, firmware, test, operating and...trends and issues. Be able to speak truth to power by taking a position and backing it up… more