- NVIDIA (Hillsboro, OR)
- We are now looking for a CPU Design Methodology Engineer ! The complexity of chip development has greatly increased over the years. We are now packing ... The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be… more
- Qualcomm (Austin, TX)
- …Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer , you will work with implementation and CAD teams ... (RTL, Physical design , Circuits, CAD) to solve key physical design problems in CPU implementations. + Develop innovative techniques in Physical design … more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are ... or MS (or equivalent experience) + 6+ years of CPU design implementation experience + Deep understanding...Ways to stand out from the crowd: + Prior CPU experience in physical implementation methodology +… more
- Qualcomm (Austin, TX)
- …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL ... with STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple...out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions.… more
- Qualcomm (Santa Clara, CA)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Emulation Engineer , you will work as part of CPU ... CPU emulation across different platforms. + Develop verification methodology , ensuring scalable and portable environment across simulation and emulation. +… more
- Qualcomm (Santa Clara, CA)
- …to create designs that push the envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer , you will build and support ... issues + Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA. +… more
- Qualcomm (Austin, TX)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate ... You will work on a selected part of the CPU Design Verification to ensure that it...based on the Architecture and Micro-architecture. + Develop Verification Methodology , ensuring scalability and portability across environments. + Develop… more
- Google (Mountain View, CA)
- …software and networking technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of ... or develop physical design timing convergence tools and flows for advanced CPU designs to achieve outstanding Power Performance Area (PPA). Google is proud to be… more
- Qualcomm (Santa Clara, CA)
- …and silicon validation. * A successful candidate requires a strong IP core (preferably CPU ) design & debug background including Project Management of IP team ... be responsible for providing technical program management support to our Custom CPU Engineering team including the following responsibilities: * Plan, drive, and… more
- quadric.io, Inc (Burlingame, CA)
- …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical ... design methodologies and automation scripts for multiple ...Electrical Engineering with a minimum of eight years of CPU /GPU/ASIC implementation + Proficiency in TCL scripting + Proficiency… more
- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation team. The team develops and supports ... VLSI organization, our team defines advanced methodologies used to design and develop every NVIDIA chip. NVIDIA chips push...the industry limits of technology and performance for GPU, CPU and SoC markets. What you'll be doing: +… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...with the team to build comprehensive & reusable checking methodology for CPU /GPU like IP (instruction accurate… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design ... Responsibilities + Work with chip leads to understand the design methodology and high level requirements in...develop and verify critical high performance and low power CPU designs. * Anticipates, identifies, and solves highly complex… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...experience. 8. 5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 9. Track record of… more
- Google (San Diego, CA)
- …might be your next career step. As a Physical Design Power Integrity Engineer , you will define on-die power grid methodology and provide solutions to meet ... more about benefits at Google. + Define power grid design methodology . + Provide power grid solutions...methodology . + Provide power grid solutions for different design contents ( CPU , GPU, SoC, etc.) to… more
- Amazon (Sunnyvale, CA)
- Description As a Design Verification Engineer at Amazon, you will be part of an advanced engineering and research team that is building world class hardware for ... resolve blocking issues. Key job responsibilities - Define the verification methodology and implement the corresponding test bench infrastructure in advanced HVL… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated ASIC Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part ... and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and low-power CPU...experience to improve the convergence flows working with the Methodology Team. What we need to see: + BS… more
- Meta (Austin, TX)
- …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...8. Experience in data path development. 9. Experience in CPU , NOC, Memory and Peripheral Subsystems. 10. Experience with… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is currently seeking a verification engineer with strong fundamentals of design verification methodology and random test generators for CPU ... next generation of CPUs? What you'll be doing: + Design and Implement Random test generation tools for NVIDIA...CPU roadmap and drive quality initiatives through verification methodology + Apply latest SW development practices for random… more
- Meta (Sunnyvale, CA)
- …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...10. Experience in data path development 11. Experience in CPU , Network protocols, NOC, Memory and Peripheral Subsystems 12.… more