- Qualcomm (Austin, TX)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer, you will work with ... teams (RTL, Physical design , Circuits, CAD) to solve key physical design problems in CPU implementations. + Develop innovative techniques in … more
- NVIDIA (Santa Clara, CA)
- …to work in a dynamic team Ways to stand out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl, Python, Tcl, ... or MS (or equivalent experience) + 6+ years of CPU design implementation experience + Deep understanding...from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical … more
- Qualcomm (Folsom, CA)
- …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... design team to develop timing constraints, drive implementation of...with STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple… more
- Qualcomm (Austin, TX)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Physical Design Clock Engineer, you will work with microarchitecture, RTL ... design , CAD, block level and top level physical design teams to create best in... clocking. + Drive overall clock generation and distribution methodology of CPU . + Work with CAD… more
- Google (Mountain View, CA)
- …in people management, developing employees. + Experience with HDL language and front-end design methodology . + Experience with CPU or AI accelerator ... practical experience. + 10 years of experience in high-performance CPU or AI accelerator logic/RTL design including...team to ensure production of quality designs, and the physical design and power teams to meet… more
- Qualcomm (San Diego, CA)
- …Area:** Engineering Group, Engineering Group > SoC Architecture **General Summary:** As a CPU Performance and Power Analysis Engineer, you will be working on CPU ... standard benchmarks and workloads. Your responsibilities lie primarily in the physical interaction with devices to enable measurement and data collection. **Required… more
- Google (Mountain View, CA)
- …a related field, or equivalent practical experience. + 8 years of experience with physical design flow such as constraints, synthesis, floor planning, place and ... for timing and power convergence. + Drive or develop physical design timing convergence tools and flows...design timing convergence tools and flows for advanced CPU designs to achieve outstanding Power Performance Area (PPA).… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with emphasis on ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple ...Electrical Engineering with a minimum of eight years of CPU /GPU/ASIC implementation + Proficiency in TCL scripting + Proficiency… more
- Belcan (Palo Alto, CA)
- Sr. Physical Design Engineer Job Number: 354330 Category: Design Engineering Description: Job Title: Sr. Physical Design Engineer Pay rate: $66.34 ... Date: Right Away Keywords: #PaloAltoJobs; #PhysicalDesignEngineerjobs; Job Description: As a Sr. physical design engineer, you will contribute to all design… more
- Broadcom (Fort Collins, CO)
- …strong technical hands-on competency in using leading edge physical design EDA tools in projects. . In-depth CPU /DSP architecture/algorithm working ... Key competencies required are: . Working experience in (digital) physical design implementation of large scale ASICs...advanced process nodes. . Opportunity to participate in innovation, design flow and methodology development to address… more
- Capgemini (Seattle, WA)
- **Job Role:** **SOC Design Verification Engineer** **Job location: Seattle WA** **Job Description:** We are looking for SOC Design Verification Engineer who can ... based on verification test plan. **Key Responsibilities:** + Drive Design Verification to closure based on defined verification metrics...8 to 10 years of hands-on experience in SystemVerilog/UVM methodology + Experience in one or more of the… more
- Cisco (San Jose, CA)
- …meet timing and performance requirements. * Help define, evolve, and support our design methodology . * Collaborate with the verification team on as-needed basis ... bugs and close code coverage. * Work closely with physical design team to close design...protocols (AXI, CHI, APB. AHB) and exposure to ARM CPU 's is desirable. * Design experience with… more
- General Motors (Austin, TX)
- …multi-disciplinary team of experienced individuals who will be driving the design , development, and deployment of advanced statistical and mathematical solutions ... various experience levels that frame opportunities, wrangle the necessary data, and design and execute analytical models in support of better business decisions.… more
- Stanford University (Stanford, CA)
- …etc. is desirable but not required. The applicant must be experienced with CPU multi-threading and GPU parallel processing programming, as well as profiling and ... web applications, or security. The successful candidate will assist in the design and assembly of custom computers for high-performance applications, such as image… more
- Qualcomm (Santa Clara, CA)
- …and silicon validation. * A successful candidate requires a strong IP core (preferably CPU ) design & debug background including Project Management of IP team ... productivity and efficiency of the team. * Manage teams through design , development, validation, test, manufacturing, deployment, and sustaining activities for… more
- Cisco (San Jose, CA)
- …and implementing the platform host test procedures and carrying out the host design test characterization and qualification. Your focus will be on interfaces from ... engineers, customer escalation engineers, & external vendors to ensure robust test methodology & timely issue mitigation, resulting in high product quality. Minimum… more