- Broadcom (Fort Collins, CO)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** DFT and STA Design Automation Senior Manager Broadcom ASIC Product Division is ... by relying on proven flows and methodology. As a Design Automation Senior Manager, you will lead...that own and provide the STA and DFT flows that enable our ASIC design … more
- Amazon (Austin, TX)
- …is possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block designers to ... integrate DFT implementations * Work with physical design ...Perl, Python or Tcl - Experience with industry standard DFT /SCAN/ATPG tools - Experience with STA constraints… more
- Cadence Design Systems, Inc. (Austin, TX)
- … DFT both in EDA and implementation + Experience in STA , Physical Design , Silicon bringup related to DFT is a plus + Flexibility/adaptability for working ... with the Modus Test Product Engineering team working on Design For Test ( DFT ) and Automatic Test...modern life depends on. We are a global electronic design automation company, providing software, hardware, and… more
- Cisco (San Jose, CA)
- …constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/ STA tools and scripting for automation , you excel at ... team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip...in Static Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus * Understanding of related digital… more
- Broadcom (San Jose, CA)
- …Expertise in micro-architecture design and PPA trade-offs. + Experience in synthesis, STA , and timing closure using tools like Synopsys DC or Cadence Genus. + ... AXI, AHB) and memory interfaces. + Understanding of low-power design techniques and DFT methodologies is a...Experience with scripting languages (eg, Python, Perl, TCL) for automation and design tool integration. + Familiarity… more
- SpaceX (Sunnyvale, CA)
- …voltage drop, logic equivalency and other signoff checks) + Develop/improve physical design methodologies and automation scripts for various implementation steps ... submicron processes leakage/dynamic + Familiar with CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact… more
- Qualcomm (San Diego, CA)
- …ASIC/SoC design flows (micro-architecture, RTL design , verification, synthesis, timing/ STA , UPF, CLP, LEC formal verification, DFT , physical design .) ... and, ability to execute critical power analysis of critical design IPs for path to DDR. This is a...next Generation, high performance, low power Memory Subsystem RTL Design , flows and methodology for high performance ASICs in… more
- NVIDIA (Westford, MA)
- …equivalent experience) with 2 years experience in Synthesis and Timing. + Understanding of DFT logic and hands-on experience in design closure. + Expertise in ... and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering team, developing… more