• Senior DFT Engineer , Hardware…

    Amazon (Sunnyvale, CA)
    …semiconductor companies as a Sr. DFT Engineer . - Top level DFT architecture definition experience. - Scan insertion tools and methodologies for Core and ... generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on...IP logics. - MBIST , BISR, BIHR insertion tools and methodologies - Experience… more
    Amazon (05/05/24)
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  • Senior Lead DFT Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …to make an impact on the world of technology. Looking for Lead SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). Ability to lead from ... and experience in scan chain insertion, compression scan technologies, memory built-in self-test ( MBIST ) and...to silicon debug + Should possess intimate knowledge of DFT insertion flows + Basic scan chain… more
    Cadence Design Systems, Inc. (04/06/24)
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  • Senior DFT Engineer (eInfochips Inc)

    Arrow Electronics (Plymouth, MN)
    **Position:** Senior DFT Engineer (eInfochips Inc) **Job Description:** **What You'll Be Doing:** + Lead efforts to map customer designs into Honeywell's ASIC ... constraints + Simulation, Conduct Code Synthesis + Test insertion ( Scan , ATPG, MBIST ) and Test Support +...+ Synopsys Design Compiler + Synopsys PrimeTime + Synopsys DFT Compiler + Synopsys VCS + Synopsys TetraMAX +… more
    Arrow Electronics (05/25/24)
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  • Sr. Synthesis & Front-End STA Engineer

    SpaceX (Irvine, CA)
    …tools (Synopsys DC, Primetime or equivalent) + Experience with clock domain crossings, DFT / Scan / MBIST /LBIST and understanding of their impact on synthesis, ... Sr. Synthesis & Front-End STA Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX...consistent full chip and block constraint partitioning + Integrate DFT /BIST insertion flows into synthesis flow + Timing closure… more
    SpaceX (05/09/24)
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  • ATE Test Development Engineer

    NVIDIA (Santa Clara, CA)
    …debugging and analytical skills + Understanding of DFT insertion techniques including SCAN , ATPG, MBIST and IOBIST. Ways to stand out from the crowd: ... We are looking for a creative ATE Test Development Engineer . NVIDIA has continuously reinvented itself for three decades. Our invention of the GPU in 1999 fueled the… more
    NVIDIA (04/16/24)
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  • ATE Test Engineer

    NVIDIA (Santa Clara, CA)
    …out from the crowd: + Understanding of DFT insertion techniques including SCAN , ATPG, MBIST , and IOBIST With competitive salaries and a generous benefits ... teams including IO design, PLL design, Product Development Engineering, DFT , and IC design to efficiently debug any product...are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want… more
    NVIDIA (06/01/24)
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  • Sr. SOC/ASIC Physical Design Engineer

    SpaceX (Redmond, WA)
    …+ Familiar with CMOS analog circuit and physical design + Knowledge of DFT / Scan / MBIST /LBIST and understanding of their impact on physical design ... Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX...enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
    SpaceX (05/17/24)
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