- NVIDIA (Santa Clara, CA)
- We are looking for SOC Design Engineer ! The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip ... System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL...with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams. What you'll be doing: +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Logic Design Engineer . As a member of our CPU Logic Design Team, you will be responsible for CPU on-chip interconnect network, coherency and ... of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT , timing analysis, floor-planning, ECO, bring-up & lab debug + Effective… more
- ICU Medical (Lake Forest, IL)
- …designs, methods, materials or processes. The role is responsible for developing new design concepts and implementing design changes that affect system performance. ... for Assembly (DFA), Design for Manufacturability (DFM) and Design for Testability ( DFT ). Identify any technical issues and schedule risks and define appropriate… more
- Cisco (San Jose, CA)
- …major role in the process of defining, developing and bringing and bring new products to market across Cisco's product line. Open-minded, driven, diverse and deeply ... of computers and networking and take it to a new level in any one of the following product...library development (Standard Cell and I/O), physical design & DFT , Signal Integrity, and complexed packaging technology. Our silicon… more