• Floorplan CAD Engineer

    Qualcomm (San Diego, CA)
    …initiatives for die area reduction and turn-around time reduction. + Project Global CAD Floorplan solutions to the Snapdragon design teams, analyze their ... by the Snapdragon design teams. * Participate to the specification of new Floorplan CAD solutions addressing the PPA requirements of the design teams. * Deep… more
    Qualcomm (11/06/24)
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  • Senior ASIC Floorplan Design…

    NVIDIA (Santa Clara, CA)
    …ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's leading SoC's and GPU's. This ... collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities + Solve timing and routing congestion issues with… more
    NVIDIA (11/06/24)
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  • Principal RF Module Design Engineer

    Skyworks (Andover, MA)
    …+ Utilization of MCM/PCB layout tools such as Allegro PCB designer, to optimize FEM floorplan between IC and CAD designers + Assist with RF test evaluation, ... due to a disability, please contact us at ###@skyworksinc.com. Job Segment: Design Engineer , Thermal Engineering, RF Engineer , CAD , Drafting, Engineering… more
    Skyworks (11/21/24)
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  • Senior Design Engineer

    Micron Technology, Inc. (Richardson, TX)
    …with modeling and simulation using industry standard simulators. Strong collaboration with CAD team to develop floorplan & routing automation. Cross group ... Units, Process Integration, Design Rules, Standard Cell Design and CAD teams to ensure best decision making enabling future...communication with Design Rules, CAD , Process integration and Layout Design to achieve DTCO… more
    Micron Technology, Inc. (10/02/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex multi-hierarchy designs, ... of multi-hierarchy designs including physical aware logic synthesis, design for testability, floorplan , place and route, static timing analysis, IR Drop, EM, and… more
    Cisco (11/05/24)
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  • Principal IO Design Engineer , HBM Design

    Micron Technology, Inc. (Folsom, CA)
    …information to enrich life. We are looking for a HBM High-speed IO Design Engineer . Are you passionate about crafting circuits for the next generation of memory that ... continuing education and competitor analysis + Proactively solicit feedback from Standards, CAD , modeling, and verification groups to ensure the design quality +… more
    Micron Technology, Inc. (10/23/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will include: * Perform full chip DRC/LVS/ERC/ANT ... with block or full chip physical verification and/or owning Physical Verification CAD flow development and support * Previous work experience working with Package… more
    Cisco (10/23/24)
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  • Senior Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Physical Design Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... all participate in establishing physical design methodologies, flow automation, chip floorplan , power/clock distribution, chip assembly and P&R, timing closure. +… more
    NVIDIA (10/08/24)
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  • Sr. Principal Layout Designer

    Skyworks (Austin, TX)
    …Completes work through use of CAD layout software + Works closely with the engineer to provide high quality layout in a timely manner + Ability to do block ... please contact us at ###@skyworksinc.com. Nearest Major Market:Austin Job Segment: Engineer , CAD , Drafting, Electrical, Telecom, Engineering, Technology Apply… more
    Skyworks (11/17/24)
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