- Qualcomm (San Diego, CA)
- … ASIC engineers with excellent analytical and technical skills, and a focus on low power , high performance ASIC designs, and, ability to execute critical ... low power designs. + Strong knowledge in the entire low power , high performance ASIC /SoC design flows (micro-architecture, RTL design, verification,… more
- The Boeing Company (Kent, WA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will lead ... processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. Plus, we're applying the latest...determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC … more
- SpaceX (Irvine, CA)
- … power intent verification and post synthesis timing validation flows + Execute low power design and physical synthesis, deploying knowledge of unified ... Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer...flow, top-down and bottom-up design methodologies + Knowledge of low - power methodologies and leakage/dynamic power … more
- Microsoft Corporation (Redmond, WA)
- …through all signoffs including timing signoff, physical verification, EMIR signoff, and Low Power Verification. + Define and implement efficient UVM-based ... team, is looking for a **Senior Quantum Digital Application-Specific Integrated Circuit ( ASIC ) Design Engineer ** to work as digital Application Specific… more
- Amazon (Cupertino, CA)
- Description Amazon Web Services provides a highly reliable, scalable, low -cost infrastructure platform in the cloud that powers hundreds of thousands of businesses ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies...ownership and deliveries * 3+ years of experience with power analysis and optimization * Experience working with SOC… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....Power , Performance, Area Analysis and techniques for reducing power . 25. Knowledge of Low power… more
- Qualcomm (San Diego, CA)
- …with system level architecture, analog design, and silicon test + Experience with High-speed, Low Area, and Low Power architectures + Experience in ... solutions and products are elegantly engineered for optimal performance and power consumption. Our system-on-chip solutions like Snapdragon bring together CPU, GPU,… more
- Meta (Austin, TX)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Architecture Responsibilities: 1. Work with AI/ML experts in the ... Collaborate with the design team to ensure that the ASIC meets its area, frequency and power ...and performant memory sub-systems for very high bandwidth and low latency computer systems 11. 6. Knowledge of SoC… more
- Amazon (Redmond, WA)
- …underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing… more
- Amazon (Cupertino, CA)
- …change the world. Amazon Web Services provides a highly reliable, scalable, low -cost infrastructure platform in the cloud that powers hundreds of thousands of ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- NVIDIA (Santa Clara, CA)
- …the chip. + Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing closure, and design documentation. + Collaborate ... We are now looking for a Logic Design Engineer . As a member of our CPU Logic...with implementation to achieve your timing, area, performance and power goals. + Assist with timing closure of super… more
- Amazon (North Reading, MA)
- …our customers love. The team works backwards from customer requirements to build super- low power , energy efficient designs that include the latest in AI, ... video processing, low power communications and CMOS fabrication technology....plans - Develop automated software test applications for effective ASIC stress testing - Collaborate with firmware teams to… more
- NVIDIA (Westford, MA)
- …will be doing: + You will drive physical design and timing of high-frequency and low - power DPUs and SoCs at block level, cluster level, and/or full chip level. ... human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering… more
- Amazon (North Reading, MA)
- …our customers love. The team works backwards from customer requirements to build super- low power , energy efficient designs that include the latest in AI, ... video processing, low power communications and CMOS fabrication technology....3+ years of demonstrable experience as a computer hardware engineer . - Strong knowledge of hardware design principles, testing… more
- Amazon (Hawthorne, CA)
- …to post-silicon validation. The team works backwards from customer requirements to build super- low power , energy efficient designs that include the latest in AI, ... video processing, low power communications and CMOS fabrication technology. Key job responsibilities - Evaluate 3rd party IP blocks - Estimate power ,… more
- Amazon (San Diego, CA)
- …any necessary support logic . Configure, instantiate and integrate 3rd party IP blocks . Understand low power design & the impact of DFT on the blocks . Perform ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...to develop world-class SOC and IP blocks, which meet power , area and performance targets. . Define, configure and… more
- Google (Mountain View, CA)
- …SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low - power design techniques. + Experience ... computer architecture or memory subsystem architecture. + Experience working with power , performance, and area trade-offs. + Experience with accelerators (Machine… more
- Amazon (North Reading, MA)
- …to post-silicon validation. The team works backwards from customer requirements to build super- low power , energy efficient designs that include the latest in AI, ... video processing, low power communications and CMOS fabrication technology. Key job responsibilities - Use and/or build bit accurate C models - Evaluate block… more
- NVIDIA (Santa Clara, CA)
- …of concepts of energy consumption, estimation, data movement and low power design. + Familiarity with Verilog and ASIC design principles, including ... We are looking for a Senior Emulation Power Engineer ! NVIDIA prides in having...Our team is responsible for analyzing fullchip and unit-level power data and driving ASIC teams to… more
- NVIDIA (Santa Clara, CA)
- …of concepts of energy consumption, estimation, data movement and low power design. + Familiarity with Verilog and ASIC design principles, including ... We are now looking for a Senior Power Optimization and Analysis Engineer ! NVIDIA...Our team is responsible for analyzing fullchip and unit-level power data, and driving ASIC teams to… more