- ManpowerGroup (Phoenix, AZ)
- **SOC Integration/ STA /Synthesis Engineer** Required Skills: + Develop and own physical design implementation of multi-hierarchy low-power designs including ... ECO in advanced technology nodes + Develop & document STA & Synthesis strategies. Interact with methodology teams to...Resolve design and flow issues related to physical design , identify potential solutions, and drive… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …of block and Chip top level You will also be responsible for interfacing with the Physical Design team on STA , timing closure and P&R, and participating in ... RTL design of high-speed interfaces. Prior experience of collaborating with Physical Design teams in multiple successful ASIC/IP tapeouts. Knowledge of the… more
- SpaceX (Irvine, CA)
- …closure in advanced nodes + Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. + Experience with power ... and timing closure + Work closely with chip architecture, design verification, physical design , DFT,...reconvergence pessimism removal + Hands-on experience in industry standard physical synthesis and STA tools (Synopsys DC,… more
- Google (Sunnyvale, CA)
- …silicon bridge, 3D die stacking. + Experience in cross-functional collaboration with chip top design , physical design , STA , package, system design ... Understanding of on and off chip power delivery and STA /voltage budget. + Familiarity with memory testing, next generation...of a larger team with Chip Architects, ASIC Engineers, Physical Design and other SI/PI Engineers. You… more
- Amazon (San Diego, CA)
- …good communication and analytical skills. - Should be able to work closely with IP Design teams and Backend Physical Design teams across multiple sites. ... is powering the latest generation of Echo devices is looking for a Sr. SOC Design Engineer- STA to continue to innovate on behalf of our customers. We are a part… more
- Cisco (San Jose, CA)
- …correlation between PNR, Spice, and STA , along with advising the Physical Design team on best practices. Additionally, you'll develop methodologies, ... refining design and timing constraints for seamless physical design closure. As part of this...guidelines, and checklists to streamline STA work, resolve design and flow issues,… more
- Qualcomm (San Diego, CA)
- …domain crossings, and signoff with static timing analysis. + Collaborate closely with RTL design and physical design teams to identify timing requirements ... for skilled engineers to focus on timing constraints development, power analysis, STA , and timing closure for premium-tier chips. This is an excellent opportunity… more
- Teradyne (North Reading, MA)
- …All About You + Technical Focus: Digital logic design and FPGA physical design (Floor-planning, P&R, STA ). + Technologies: Xilinx and/or Intel ... a dynamic multi-site development environment. This role reports into the Logic Design organization. + Architecture, design , implementation, verification, and lab… more
- Cadence Design Systems, Inc. (Austin, TX)
- …Execute and deliver on timing analysis, ECO flows, Extraction, Power, EMIR and/or physical design and ensure integrity of delivered solutions. Individual should ... close tool bug fixes. Work on various aspects of physical design including timing analysis, place and...OCV/SOCV concepts, derates, PBA timing, Distributed, Concurrent and Hierarchical STA flows. . Work efficiently with R&D and customer… more
- Qualcomm (Austin, TX)
- …define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... design team to develop timing constraints, drive implementation of...primary responsibilities will lie in coding scripts used with STA native tools and also useful in enabling CPU… more
- Google (Mountain View, CA)
- …convergence including Static timing analysis ( STA ), electrical checks, and physical verification. + Experience in package design and signal/power integrity ... technical leadership in the area of Application Specific Integrated Circuit (ASIC) physical design as we realize sophisticated electronics for control and… more
- Cadence Design Systems, Inc. (Austin, TX)
- …+ Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure, ... how to best utilize Cadence technologies to achieve their design goals and meet project schedules + Conduct technical...tools in the IC digital implementation & signoff flows ( STA tools) + Strong STA and SDC… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...and fix signoff closure issues in static timing analysis ( STA ), noise, logic equivalency, physical verification, electromigration… more
- Capgemini (Austin, TX)
- …*You will be responsible for running DRC tools like IC-Validator on subsystem physical Design database for TSMC 5nm, 3nm and 2nm nodes. *You ... **Optional skills:** . ICC/ICC2, Primetime, STAR-RC, Python, TCL or Perl . Synopsys Physical Design tools - ICC/ICC-2, Primetime, STAR-RC, Python, TCL or Perl… more
- ManpowerGroup (Phoenix, AZ)
- **Job Title:** ** Physical Design -Power Integrity Flow Development Engineer** **Location:** + **Primary:** Phoenix, AZ + **Secondary:** Remote in the US. ... including power analysis, IR Drop, EM, and IR drop-based STA in advanced technology nodes (5nm and below). +...+ Resolve power and power integrity issues related to physical design , identify potential low-power solutions, and… more
- NVIDIA (Santa Clara, CA)
- …+ Familiarity with Machine Learning/Deep Learning + Experience in other Physical Design methodologies such as P&R, DFT, STA etc. With competitive salaries ... EDA providers on 3D-IC EDA feature requirements and 3D-IC design methodology. + Design optimization of 3D advanced silicon/package technology features to enable… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... which is the primary task. + Develop flows/recommendations on STA and PNR in deep submicron physical ...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
- Siemens Digital Industries Software (Wilsonville, OR)
- …methodology from RTL Synthesis to Physical Implementation phases o RTL Design /Verification, LEC, STA analysis o Integration and validation of Silicon-on-Chip ... leading EDA and MCAD tools that facilitate the architectural planning, physical design /verification, muti-die based electrical, thermal, mechanical stress… more
- Cadence Design Systems, Inc. (Austin, TX)
- …and vPlans. Provide timely specification clarifications and debug support + Physical design deliverables. Create functional timing constraints, synthesize RTL ... looking for an experienced RTL designer to contribute to architecture and design for next generation SoCs targeting Hyper-Scalar, Automotive, IoT and Mil-Aero… more
- Honeywell (Moca, PR)
- …(HVM) testing of the design . * Development of the Static Timing Analysis ( STA ) constraints for physical construction and timing closure in all DFT modes, and ... association with the Physical Design team to achieve timing closure for the DFT modes. * Team up with cross-functional teams to translate product requirements… more