- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Fusion ... technology-focused company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) to join our ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- Amazon (Cupertino, CA)
- …of machine learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our ... today. Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- NVIDIA (Santa Clara, CA)
- …devices for high-speed optical interconnect and sensing applications. + Developing physical design methodologies for implementation of graphics processors and ... driving cars. Come join us in our mission to Engineer the next generation of best-in-class products. Our teams...and creative solutions to the state of the art physical design problems that are needed for… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical ...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- Qualcomm (San Diego, CA)
- …system-level in 5nm, 4nm and beyond (process technologies). + You will be working with physical design team (and other teams) on timing closure, CAD teams, IP ... Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing...will work with best-in-class methodologies, tools and technology to design innovative SOC products at the block/IP-level and at… more
- Capgemini (San Francisco, CA)
- …memory interface considering Input/Output Physical Layer (IO PHY), SI/PI and physical design . **Required Skills:** *Bachelor or Master degree in Electrical ... the US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Physical Design Engineer - ASIC Package Engineer SI/PI Engineer_… more
- Qualcomm (Santa Clara, CA)
- …create designs that push the envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer , you will build and support the ... flows, and resolve project-specific issues + Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and… more
- Qualcomm (Folsom, CA)
- …to define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL ... and also useful in enabling CPU timing infrastructure and methodology impacting multiple CPU projects in Qualcomm. You will...out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions.… more
- Qualcomm (Santa Clara, CA)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Physical Design Clock Engineer , you will work with ... design , CAD, block level and top level physical design teams to create best in...standard cell optimizations, and clock construction. + Defined clock methodology across various designs. + Preferred experience in deep… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...data-path intensive designs. 24. Experience in the 3D-IC technology, methodology , and advanced packaging. 25. Experience in validating Power… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- Google (Sunnyvale, CA)
- …Experience leading one or more aspects of physical design or physical design flow/ methodology , to successful tape-outs and shipping silicon. + ... Experience in extraction of design parameters, QoR metrics, and analyzing data trends. +...systems. In this role, you will work on the physical implementation of ASICs using advanced technology nodes. You… more
- Broadcom (San Jose, CA)
- …features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
- Broadcom (San Jose, CA)
- … methodology , power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... you apply.** **Job Description:** Broadcom is lookign for ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more
- Google (Sunnyvale, CA)
- …related field, or equivalent practical experience. + 3 years of experience in physical design , verification, and various methodologies. + Experience in Python, ... practical experience. + 3 years of experience in ASIC physical design flows with emphasis on ...and fullchip level. + Contribute to process flow and methodology for full chip assembly and tapeout signoff. +… more
- State of Colorado (Denver, CO)
- Engineer -in-Training III - Pavement Design Print (https://www.governmentjobs.com/careers/colorado/jobs/newprint/4855145) Apply Engineer -in-Training III - ... position is open only to Colorado state residents. Primary Physical Work Address 4670 N. Holly St. Denver, CO...projects. About the Position CDOT has a vacancy for Engineer -in-Training IIIs in our Pavement Design unit.… more