• Sr. Physical Design

    Amazon (Cupertino, CA)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... 10yrs or MS + 7yrs in EE/CS - 5+ years of experience in developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for… more
    Amazon (10/18/24)
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  • Senior Physical Design

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Fusion ... technology-focused company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics processors and SOCs. +… more
    NVIDIA (11/01/24)
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  • Senior Physical Design

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Improvement ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
    NVIDIA (11/01/24)
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  • CPU Physical Design

    Qualcomm (Austin, TX)
    …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer , you will work with ... flows. + Good data analytical skills to identify and root cause physical design issues. **Roles and Responsibilities** + Work with cross functional teams (RTL,… more
    Qualcomm (10/31/24)
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  • Senior Physical Design

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
    NVIDIA (11/01/24)
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  • Physical Design Methodology

    quadric.io, Inc (Burlingame, CA)
    …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
    quadric.io, Inc (10/05/24)
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  • Senior Physical Design

    NVIDIA (Santa Clara, CA)
    …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
    NVIDIA (08/08/24)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
    NVIDIA (09/18/24)
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  • Senior CPU Implementation Methodology

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical ...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
    NVIDIA (09/14/24)
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  • Senior Clocks Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …today. The NVIDIA Clocks group is looking for a top ASIC Methodology engineer with proven experience in high-speed logic design and verification. In order to ... needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation and… more
    NVIDIA (10/22/24)
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  • Senior Power Methodology and Modeling…

    NVIDIA (Santa Clara, CA)
    Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. What you'll be doing: + Define and implement tools… more
    NVIDIA (10/17/24)
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  • Chief of Data Analytics, Methodology ,…

    Stanford University (Stanford, CA)
    …and interpersonal skills will be crucial to success. The chief of data analytics, methodology and integration will be required to: design , develop, optimize, and ... Chief of Data Analytics, Methodology , and Integration **Hoover Institution, Stanford, California, United...a live assessment exercise. **CORE DUTIES*:** + Architect and engineer the design , development, implementation and maintenance… more
    Stanford University (09/13/24)
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  • Senior E/E & Semiconductor Engineer - ASIC…

    Capgemini (San Francisco, CA)
    ** Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San… more
    Capgemini (10/16/24)
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  • ASIC Engineer , Physical

    Meta (Sunnyvale, CA)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...data-path intensive designs. 24. Experience in the 3D-IC technology, methodology , and advanced packaging. 25. Experience in validating Power… more
    Meta (10/22/24)
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  • Senior ASIC Physical Design

    Capgemini (San Francisco, CA)
    **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
    Capgemini (10/16/24)
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  • Sr. Physical Design Engineer

    Amazon (San Diego, CA)
    …Edge that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. ... design such as Clocking, Power Delivery and Partition synthesis/APR. - Drive physical design and timing closure including FEV, LVS, DRC, and reliability… more
    Amazon (10/08/24)
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  • Senior ASIC Physical Design

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
    NVIDIA (09/27/24)
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  • Senior Physical Design

    Broadcom (San Jose, CA)
    …features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
    Broadcom (11/01/24)
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  • R&D Engineer Physical Design

    Broadcom (San Jose, CA)
    methodology , power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... apply.** **Job Description:** Broadcom is looking for a ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more
    Broadcom (11/01/24)
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  • Civil Design Engineer Supervisor

    The City of Rochester, MN (Rochester, MN)
    Civil Design Engineer Supervisor Print (https://www.governmentjobs.com/careers/rochester/jobs/newprint/4670162) Apply  Civil Design Engineer Supervisor ... DESCRIPTION The City of Rochester welcomes applications for: Civil Design Engineer Supervisor Nature of Work The...and utilize applicable studies to determine the basic engineering methodology to be employed and basic layout of the… more
    The City of Rochester, MN (10/15/24)
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