- Qualcomm (San Diego, CA)
- …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... determine product execution path. **Principal Duties & Responsibilities** - Perform digital synthesis and static timing analysis (STA) for complex digital designs. -… more
- Qualcomm (San Diego, CA)
- …+ Implement Hierarchical blocks of the DDR/system cache subsystem running the physical synthesis with Synopsys Fusion Compiler. + Work with RTL ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog),...foresee and plan around obstacles. + Proficient in running Physical synthesis with Synopsys Fusion Compiler on… more
- Cadence Design Systems, Inc. (San Jose, CA)
- … Synthesis Solution product. Genus is a complete product that encompasses logic synthesis and physical design. The product breadth means we are looking for ... Design Systems is looking for a highly motivated software engineer to work as a member of the R&D...The role's day to day responsibilities cover: + Design, implementation and validation of new innovative synthesis … more
- NVIDIA (Santa Clara, CA)
- …software engineering methodologies + Build flows for methodologies incorporating logic/ physical synthesis , design planning, equivalence checking for ... one of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis , physical design, formal equivalence checking. + Proven track record developing… more
- Abbott (Alameda, CA)
- …This position is responsible for participating in the planning and development/ synthesis of sensor algorithm for new product launches and on-market products. ... CA. **What you'll work on** + Participate in algorithm development synthesis incorporating mathematical models and in optimizing design processes. + Participate… more
- SpaceX (Irvine, CA)
- …for test modes + Timing closure ownership throughout the entire project cycle (RTL, synthesis , and physical implementation ) + Analysis of clock domain ... Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX...timing validation flows + Execute low power design and physical synthesis , deploying knowledge of unified power… more
- Meta (Sunnyvale, CA)
- …and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/ Physical Synthesis using advanced ... LEC. 20. 5+ years of experience in Design Integration and Front-End Implementation . 21. Synthesis Background, Timing Constraints Development, Floorplanning and… more
- NVIDIA (Santa Clara, CA)
- …(DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis , placement, routing, logic ... We are looking for a Senior CPU Implementation Methodology Engineer to join our...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- Amazon (Redmond, WA)
- …As the implementation lead you will set up the flow for both logic and physical synthesis flow for various technology nodes. * Work with the ASIC design and ... equivalent experience. * 7+ years of experience in ASIC implementation , ie, synthesis , STA and working with...leading or solely developing the methodology and scripts for physical synthesis . * Proven track record in… more
- SpaceX (Irvine, CA)
- SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where ... human life on Mars. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) At SpaceX we're... design and timing closure + Familiar with ASIC synthesis and physical design flows and methodologies… more
- Meta (Sunnyvale, CA)
- …scale efficiently. You will have an opportunity to participate in design implementation /emulation, physical design, EDA infrastructure methods, and design power ... ASIC engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Implementation Responsibilities: 1. Participate in Design … more
- Broadcom (Fort Collins, CO)
- …and/ or timing closure - floor-planning, partitioning, placement, clock tree synthesis , route, timing analysis, timing closure, physical verification (LVS/DRC). ... Should be well experienced in floor-planning, partitioning, placement, clock tree synthesis , route and physical verification and/ or constraints development,… more
- Qualcomm (San Diego, CA)
- …desirable. Job Description: **Principal Duties and responsibilities** + Develop constraints for physical power aware synthesis , low power multi voltage domain ... create a smarter, connected future for all. Qualcomm's SoC implementation team is seeking talented engineers to work on... team is seeking talented engineers to work on synthesis , timing constraints, formal verification, power analysis, STA and… more
- Cisco (San Jose, CA)
- …most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex multi-hierarchy designs, ... design implementation of multi-hierarchy designs including physical aware logic synthesis , design for testability,...and Physical verification. * Hands-on experience in physical synthesis , floor planning, P&R, and timing… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines ... planning and analysis, timing closure, STA, signal integrity and physical design checks. + Participate in large complex design...Requires a minimum of 8 years of related ASIC implementation experience. + BS degree in Electrical Engineering or… more
- Broadcom (San Jose, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** ASIC implementation engineer with demonstrated expertise in multiple disciplines ... methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design implementations using the… more
- Amazon (Cupertino, CA)
- …Qualifications - Expertise in high-performance, low-power physical design, and implementation techniques with industry standard synthesis , PnR, or Signoff ... integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us...in EE/CS - 5+ years of experience in developing physical design methodology or CAD flows in synthesis… more
- Amazon (Cupertino, CA)
- …power-performance-area tradeoffs for physical design closure - Drive IO/Core block physical implementation through synthesis , floor planning, bus / pin ... scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and… more
- NVIDIA (Santa Clara, CA)
- …Nvidia's CPUs and GPUs. + Explore design space, create optimum floorplan, drive synthesis , physical implementation , and timing closure by understanding ... intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic...design and implementation . + Hands-on experience in physical synthesis , floor planning, P&R, and timing… more
- Qualcomm (San Diego, CA)
- …**Job Description: Principal Duties and Responsibilities** + Develop constraints for physical power-aware synthesis , setup for various modes/corners and ... transformation to help create a smarter, connected future for all. Qualcomm's SoC Implementation Team is looking for skilled engineers to focus on timing constraints… more