• RTL Design Engineer

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... Integration. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with a scripting language like… more
    Google (09/11/24)
    - Save Job - Related Jobs - Block Source
  • RTL Design Engineer , Camera…

    Google (San Diego, CA)
    …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer...integration. In this role, you will be responsible for RTL design development of camera and machine… more
    Google (08/22/24)
    - Save Job - Related Jobs - Block Source
  • Sr. RTL Design Engineer

    Amazon (Boise, ID)
    …Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer , you will be part of an advanced architecture team that ... with team members across multiple disciplines - Develop detailed design specifications and documentation - Perform RTL ...development experience with a record of taping out production silicon - Experience with design development using… more
    Amazon (09/11/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Rtl Design Engineer

    Google (Madison, WI)
    …+ Work with Design Validation (DV) teams to create testplans for, verify, and debug design RTL . + Work with physical design teams to ensure design ... practical experience. + 2 years of experience in Digital design using SystemVerilog RTL . Preferred qualifications: +...one or more successful ASIC products from concept to silicon . + Experience interacting with software, system hardware, and… more
    Google (08/29/24)
    - Save Job - Related Jobs - Block Source
  • Sr ASIC Modem design Engineer

    Amazon (Redmond, WA)
    …underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using ... silicon from system specification to chip specification to RTL to optimizing timing / power to chip level...models in MATLAB. - Involve in control plane logic design and interfaces to bus fabrics. - Explore and… more
    Amazon (09/03/24)
    - Save Job - Related Jobs - Block Source
  • Staff Silicon Engineer , Physical…

    Google (Mountain View, CA)
    …technology lead driving Physical Implementation for complex ASIC project(s). + Experience with pre- silicon and post- silicon Design For Test (DFT). + ... RTL and functionality from a full chip perspective, collaborate with RTL design and architecture. Develop and own full chip timing constraints. + Perform… more
    Google (08/25/24)
    - Save Job - Related Jobs - Block Source
  • Silicon Power Efficiency Design

    Google (Sunnyvale, CA)
    …using SystemVerilog or similar Hardware Description Language (HDL), and industry experience in silicon power or RTL design . Preferred qualifications: + ... performance, efficiency, and integration. You will be part of a silicon design team developing ASICs used to accelerate machine learning computation in… more
    Google (08/30/24)
    - Save Job - Related Jobs - Block Source
  • Silicon Design Engineer 2

    Microsoft Corporation (Redmond, WA)
    …high-performance Azure cloud servers, clients, and augmented reality. We are looking for a ** Silicon ** ** Design Engineer ** **2** to work on leading edge ... produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a...will be responsible for microarchitecture and Register Transfer Level ( RTL ) implementation of IP blocks, working with a group… more
    Microsoft Corporation (09/10/24)
    - Save Job - Related Jobs - Block Source
  • Sr. DDR IP Design Engineer

    SpaceX (Redmond, WA)
    Sr. DDR IP Design Engineer ( Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out exploring the ... of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER ( SILICON ENGINEERING) At...Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation,… more
    SpaceX (07/22/24)
    - Save Job - Related Jobs - Block Source
  • Sr. Design Verification Engineer

    SpaceX (Redmond, WA)
    …and analyzing results + Experience with scripting languages, eg Python for automation + RTL design , chip bring-up, and post- silicon validation experience + ... Sr. Design Verification Engineer ( Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out… more
    SpaceX (09/05/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Design Engineer , Machine…

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power...Silicon Validation teams to ensure functionality of the design . + Provide input on synthesis, timing closure, and… more
    Google (08/24/24)
    - Save Job - Related Jobs - Block Source
  • Sr. SOC/ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ASIC Physical Design Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER ( SILICON ENGINEERING) At...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design more
    SpaceX (08/16/24)
    - Save Job - Related Jobs - Block Source
  • Sr. SOC/ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer ( Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... on Mars. SR. SOC/ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER ( SILICON ENGINEERING) At SpaceX we're leveraging...providing fast, reliable internet to 3M+ users worldwide. We design , build, test, and operate all parts of the… more
    SpaceX (08/24/24)
    - Save Job - Related Jobs - Block Source
  • Silicon Prototyping Emulation…

    Meta (Sunnyvale, CA)
    …comfortable working complex SoC devices, emulation flows, virtualized sensors, displays, RTL design /verification, CV/ML/Gfx algorithms, OS/RTOS kernel and driver ... silicon , hardware, software, and content. Meta Reality Labs team seeks Silicon prototyping Emulation engineer .Our End-to-End (E2E) pre- silicon team… more
    Meta (08/23/24)
    - Save Job - Related Jobs - Block Source
  • Silicon DD Engineer III

    Actalent (West Menlo Park, CA)
    Job Title: Silicon DD Engineer IIIJob Description The team...years of experience as a Digital Design Engineer + Recent experience with IP RTL coding ... within the past 2-3 years + Experience having worked on a design from scratch + Experience in RTL coding and coding for low power in ASICs + Experience in… more
    Actalent (09/17/24)
    - Save Job - Related Jobs - Block Source
  • Silicon Prototyping FPGA Engineer

    Meta (Austin, TX)
    …FPGA/Emulation platform builder, comfortable working on boards, sensors, displays, RTL design /verification, CV/ML/Gfx algorithms, virtual platforms, OS/RTOS ... silicon , hardware, software, and content. Facebook Reality Labs team seeks a Silicon Prototyping (FPGA) Engineer . Our End-to-End (E2E) proto team enables this… more
    Meta (08/06/24)
    - Save Job - Related Jobs - Block Source
  • Silicon DD Engineer

    Fresh Consulting (Redmond, WA)
    …. (Kintex/Virtex UltraScale+ desired, 7-series minimum) - 4+ years of experience as a Digital Design Engineer and/or a Chip Lead. - Experience in RTL coding, ... apply to all jobs - https://freshconsulting.applytojob.com/apply/ or visit freshconsulting.com/careers Title: Silicon DD Engineer Duration: 1 year with possible… more
    Fresh Consulting (08/16/24)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and… more
    NVIDIA (09/11/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Design Engineer , Cloud-Scale…

    Amazon (Cupertino, CA)
    …- BS in Electrical Engineering or related technical field - 5+ years of experience in RTL design for SOC - 5+ years of experience VLSI engineering - 5+ years ... design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications. - Analyze design ,… more
    Amazon (07/25/24)
    - Save Job - Related Jobs - Block Source
  • Physical Design Engineer

    Cisco (San Jose, CA)
    …an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design ... silicon validation phases with additional exposure to physical design signoff activities. What You'll Do You will be...which is responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer more
    Cisco (09/14/24)
    - Save Job - Related Jobs - Block Source