• Sr. SerDes Characterization…

    SpaceX (Irvine, CA)
    Sr. SerDes Characterization and Validation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where ... this possible, with the ultimate goal of enabling human life on Mars. SR. SERDES CHARACTERIZATION AND VALIDATION ENGINEER (SILICON ENGINEERING) At SpaceX… more
    SpaceX (01/10/25)
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  • Senior Mixed Design Validation

    NVIDIA (Santa Clara, CA)
    …activities and characterization of high-speed mixed signal circuits and will lead system validation with electro-optical transceivers. The ideal candidate will ... data of high-speed interfaces and modules. What you'll be doing: + Develop validation test suites for high-speed IOs including Ethernet and InfiniBand + Perform deep… more
    NVIDIA (03/19/25)
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  • Hardware Systems Engineer , NPI AI

    Meta (Austin, TX)
    …a systems based approach to Meta Silicon hyperscalar bring up and validation . **Required Skills:** Hardware Systems Engineer , NPI AI Responsibilities: 1. ... **Summary:** Meta is seeking a Systems Engineer to join our Release...Meta servers including prototyping of experimental HW, pre-production hands-on system validation and hardware debugging, enabling production-ready… more
    Meta (01/24/25)
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  • Principal Engineer - Signal and Power…

    Qualcomm (Santa Clara, CA)
    …presentation of results. This candidate's main functional area is high-speed SerDes /memory interface electrical model extraction and system -level simulation, ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog),...+ 10+ years of experience with 5+ years in DDR/ SerDes in Package/PCB/ System Design related to compute/server… more
    Qualcomm (02/21/25)
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  • ASIC/SoC System Level Test Engineer

    Google (Sunnyvale, CA)
    …focus on TPU architecture and its integration within AI/ML-driven systems . As a System Level Test Engineer , you will help to integrate SoC ( System ... practical experience. + 5 years of industry experience with System Level Test or System validation...testing and characterizing IP subsystems such as CPUs, GPUs, SerDes , DDR/HBM. + Knowledge of CPU Architecture, CPU Boot… more
    Google (03/21/25)
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  • Software Engineer II

    Cadence Design Systems, Inc. (San Jose, CA)
    …to define, validate and enable the products. We are now looking for a hands-on system integration engineer who wants to expand his/her scope, work with the ... grow his/her career. We are hiring for a Software Engineer II. This position is a highly visible function...simulation, silicon design, HW design, firmware design, silicon bring-up, system bring-up, HW/SW debug, verification and validation .… more
    Cadence Design Systems, Inc. (02/06/25)
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  • Hardware Systems Engineer

    Cisco (Milpitas, CA)
    …to deliver the best quality and best power efficiency using groundbreaking Serdes technology at the highest bit rates possible. Your responsibilities will span ... way. You are a hard-working individual, dedicated to designing innovative electronic systems . You have a strong technical foundation and are continuously eager to… more
    Cisco (03/17/25)
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  • Sr. Hardware System Design Engineer

    Broadcom (San Jose, CA)
    …related experience + 8-10 years of proven experience as a Hardware Systems Design Engineer , with a focus on system design and development. + Expertise in PCB ... Description:** We are seeking a highly motivated Hardware Design Engineer with a strong focus on system ...system bring-up, characterization, and debugging of complex embedded systems . + Familiarity with interfaces such as PCIe, DDR,… more
    Broadcom (02/01/25)
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  • ASIC Engineer , Infra Silicon Lifecycle

    Meta (Sunnyvale, CA)
    systems , from early labs to data center deployments. 3. Understand production system use cases to improve validation . 4. Provide feedback into next ... 12. Experience working with internal and external partners for ASIC and/or systems development. 13. Experience developing/ using validation infrastructure across… more
    Meta (01/15/25)
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  • Signal and Power Integrity Engineer

    Qualcomm (San Diego, CA)
    …**Minimum Qualifications:** + 8+ years of experience with 5+ years in DDR/ SerDes in Package/PCB/ System Design related to compute/server standards. + Experience ... help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate,… more
    Qualcomm (03/21/25)
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  • Hardware Engineer - ML Acceleration,…

    Amazon (Austin, TX)
    …seeking a Hardware Design Engineer with role in the definition, design and validation of AWS next generation ML Chips, Cards and server integration. As a senior ... in the design and execution of all PCIe and Serdes topics, with the goal of creating and customized...SW team to define and implement diagnostics for hardware validation at component, interface, and system level… more
    Amazon (03/07/25)
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  • FPGA DSP Firmware Design Engineer

    Leidos (Arlington, VA)
    …of the Leidos Innovation Center is looking for a FPGA DSP Firmware Design Engineer to work with a multi-disciplined design team (electrical engineers, systems ... and integrate challenging DSP FPGA designs and RF sensor systems based on given project requirements. Candidate will have...team to design and integrate DSP applications for latest System on a Chip (SoC) implementations such as Xilinx… more
    Leidos (02/07/25)
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  • Staff Signal Integrity Engineer , Platforms

    Google (Sunnyvale, CA)
    …volume production design, with a focus on signal integrity, power integrity and lab validation . + Lab experience with SerDes testing. Understanding of SERDES ... Python, bash). Understanding of FEC and its implications for system design. + Familiarity with PCIE, DDR, SATA, Ethernet...designed and made in-house. As a Staff Signal Integrity Engineer , you will design and build the systems more
    Google (03/04/25)
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  • Space Lasers Engineer , Electro-Optical…

    SpaceX (Redmond, WA)
    …laser communications engineer , you will be responsible for optical communication system design, validation , and operation. You will help shape the near-earth ... Space Lasers Engineer , Electro-Optical (Starlink) at SpaceX Redmond, WA SpaceX...systems . RESPONSIBILITIES: + Apply expertise to laser communication system development, including design, analysis, and validation more
    SpaceX (03/19/25)
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  • Hardware Systems Engineer

    Cisco (Milpitas, CA)
    …Impact You are a hard-working individual, dedicated to designing innovative electronic systems . You have a strong technical foundation and are continuously eager to ... the best quality and best power efficiency using groundbreaking Serdes technology at the highest bit rates possible. Your...Electrical or Computer Engineering * 7+ years experience in system level development * Experience in Ethernet, high speed… more
    Cisco (02/14/25)
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  • Sr. SOC/ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    engineer who will work alongside world-class cross-disciplinary teams ( systems , firmware, architecture, design, validation , product engineering, ASIC ... Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where… more
    SpaceX (03/04/25)
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  • FPGA Engineer , Kuiper Government Solutions

    Amazon (El Segundo, CA)
    …an ambitious program that continues to push the state of the art in distributed systems and hardware design. As an FPGA engineer on the Kuiper Government ... you will create FPGA solutions to support Amazon Project Kuiper's satellite communication system . This is a unique opportunity to define a groundbreaking new … more
    Amazon (02/18/25)
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  • Signal Integrity Engineer

    Qualcomm (Hillsboro, OR)
    …CXL, USB, Ethernet, etc.). + Experience in developing SI methodologies from die to system , with lab correlation and validation . + Proficiency with 2D/2.5D/3D EM ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > Systems Engineering **General Summary:** Qualcomm Data Center team is developing… more
    Qualcomm (03/13/25)
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  • ASIC Package Engineer SI/PI

    Meta (Sunnyvale, CA)
    …as part of a world-class engineering team. **Required Skills:** ASIC Package Engineer SI/PI Responsibilities: 1. Drive chip-package- system co-design by driving ... **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal Integrity, and Power Integrity focus for its ASIC packaging team to support the… more
    Meta (02/14/25)
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  • Senior Signal Integrity Engineer

    Google (Sunnyvale, CA)
    …with Allegro, ADS, MATLAB, PowerDC, PowerSI, HFSS, SIwave, and CST. + Experience with SerDes testing in a lab setting, and familiarity with PCIE, DDR, SATA, and ... Ethernet standards. Understanding of state-of-the-art SERDES capabilities, and of FEC and... capabilities, and of FEC and its implications for system design. + Experience with product development process for… more
    Google (02/22/25)
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