- Broadcom (Fort Collins, CO)
- …time correct on schedule ASIC designs by relying on proven flows and methodology. As a STA Design Automation Engineer you will join a highly skilled ... team of engineers that own and provide the flows that enable our ASIC design teams. This position would focus on developing, testing, and enhancing our STA … more
- NVIDIA (Westford, MA)
- …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class CDC/ STA Design Engineers to join our outstanding Networking Silicon ... + You will play a major role analyzing the design and driving fixes as well as developing, maintaining,...(CDC), Reset Domain Crossing (RDC) and Static Timing Analysis ( STA ) constraints and methodology for our DPUs and SOCs… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to ... and deliver on timing analysis, ECO flows, Extraction, Power, EMIR and/or physical design and ensure integrity of delivered solutions. Individual should be able to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to ... experience with Timing, Emir, Characterization & Simulation tools, and good circuit design knowledge to help enable Signoff solutions at customer site. Also, close… more
- Qualcomm (Austin, TX)
- …should be willing to work in cross-collaborative environment + Strong experience in design automation using TCL/Perl/Python. + Familiar with digital flow ... closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with...on different designs and technology nodes. + Work on automation scripts within STA /PD tools for methodology… more
- Broadcom (Irvine, CA)
- …strong team player. Candidates will primarily be responsible for working on automating design flows, supporting synthesis deliverables & STA . Apart from this, ... of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products....experience in flow development , synthesis constraints development / STA is a must, or MSEE and 6+ years… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... ICC/ICC2, PTSi, and Cadence EDA Tool Suite *Experience in Design Automation and UNIX system. *Experience in...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:**… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... integration and ECO generation. + Expertise in timing closure ( STA ) of high frequency blocks + Handling blocks of...PTSi, and Cadence EDA Tool Suite + Experience in Design Automation and UNIX system. + Experience… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and ... and reliability through increasingly comprehensive modeling, informative analysis, and automation . This work will influence the entire next generation computing… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...logic equivalency and other signoff checks) + Develop/improve physical design methodologies and automation scripts for various… more
- Teradyne (Agoura Hills, CA)
- …Hills, CA is looking for an enthusiastic candidate for the position of Semiconductor Design Engineer , to design high-speed analog circuits in mixed-signal ... We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions....instruments. We are looking for a candidate with CMOS design and layout experience who has successfully taped out… more
- The Boeing Company (Huntington Beach, CA)
- …Research & Technology is currently seeking a **Digital Integrated Circuit Physical Design Engineer (Associate, Mid-Level or Senior)** with experience developing ... setup and hold violations, and perform static timing analysis ( STA ) to achieve timing closure. + Stay updated with...scripting languages such as Tcl, Perl, or Python for automation and design flow enhancement. + Experience… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to ... design flow. Experience with design tools such as Incisive/NCSim, Genus/ Design Compiler, STA with Tempus/PrimeTime, power analysis. + Experience with Lint… more
- Amazon (Austin, TX)
- …member of the Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership ... possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test (DFT) architectures * Work with block designers to… more
- Meta (Sunnyvale, CA)
- … scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis, STA , Power). 11. Work closely with the Design Engineers, DV Engineers, ... and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using advanced optimization… more
- Cisco (San Jose, CA)
- …constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/ STA tools and scripting for automation , you excel at ... and SDC flow development. * Developing methodologies, guidelines, and checklists to streamline STA work, along with advising the Physical Design team on best… more
- Qualcomm (San Diego, CA)
- …and methodologies for accuracy, compute, in close collaboration with Snapdragon Physical Design and Timing/PDN teams. Qualcomm is using leading edge internal and EDA ... and developing good-by-construction hierarchical solution, as well as enabling the latest STA , IR, EM, Thermal features to reduce conservatism in Signoff. **This… more
- Google (Sunnyvale, CA)
- …silicon bridge, 3D die stacking. + Experience in cross-functional collaboration with chip top design , physical design , STA , package, system design , and ... the SI/PI field. + Experience in chip package SI/PI design for interconnections and advanced package design ....with Matlab, Python, C++ and statistical tools to establish automation flows and data processing. + Understanding of on… more
- Micron Technology, Inc. (Richardson, TX)
- …designs worldwide. + Drive research and development at the intersection of IC Design Automation and Machine Learning to envision, scope, develop and deliver ... the Engineering Automation (EA) organization at Micron. We deliver DTK ( Design Technology Kit) collateral, environments, tools and flows for the design ,… more
- DoorDash (San Francisco, CA)
- …the foundation for decision-making at DoorDash. About the Role DoorDash is looking for a Sta ff Software Engineer ,Data to be a technical lead and help architect ... implement and enforce best practices for data infrastructure and automation + Design , develop and implement large...+ 8+ years of professional experience as a hands-on engineer and technical leader leading multiple projects + 6+… more