• Senior ASIC Front End

    NVIDIA (Santa Clara, CA)
    …efficiency and support + Improve the speed, flexibility and extensibility of the GPU front end build flow + Keep the GPU Continuous Integration system at ... NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position… more
    NVIDIA (11/07/24)
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  • Sr. SOC/ ASIC Timing Signoff & Front

    SpaceX (Irvine, CA)
    Sr. SOC/ ASIC Timing Signoff & Front - End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT - END ...as needed COMPENSATION & BENEFITS: Pay range: Synthesis and Front - End STA Engineer/ Senior : $170,000.00 -… more
    SpaceX (11/22/24)
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  • Senior Principal Digital Engineer (FPGA…

    Northrop Grumman (Baltimore, MD)
    …fields + Active DoD Top Secret Clearance or higher + Experience with industry standard ASIC front - end design tools for synthesis, LEC, CDC + Experience with ... for you to join our team as a Principal Digital Engineer/ Senior Principal Digital Engineer (FPGA and ASIC Design) based out of Linthicum, MD. **What You'll get… more
    Northrop Grumman (09/20/24)
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  • Senior ASIC CAD Engineer

    Fortive Corporation (Beaverton, OR)
    Job Title: Senior ASIC CAD Engineer Job Description: We are seeking an experienced and detail-oriented Senior CAD Engineer to join our team. The successful ... to create, modify, and maintain an intuitive and automated ASIC design environment. This role will also require extensive...Develop, enhance, and maintain analog, mixed signal, and digital front and back- end flows. + Support electrical… more
    Fortive Corporation (11/23/24)
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  • Senior Mixed-Signal ASIC Designer,…

    Google (Mountain View, CA)
    Senior Mixed-Signal ASIC Designer, Project Taara Hardware Engineering Mountain View, CA This is a fixed-term contract position for 12 months About the Team: ... and digital design for free-space optical communication links including; analog front - end , precision D/A and A/D converters, high speed serializer/deserializer,… more
    Google (09/19/24)
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  • Senior ASIC Verification…

    NVIDIA (Santa Clara, CA)
    …be doing: + Improve the speed, flexibility, and extensibility of the High-Speed IO front end integration, build, and verification flows + Apply best in class ... NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in...of relevant industry experience + Exposure to computer architecture, ASIC design, and verification methodology is required + Experience… more
    NVIDIA (11/15/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …responsible for crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the chip, ... today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...interacts with the floor-planning and back end teams to help craft the physical floorplan of… more
    NVIDIA (10/22/24)
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  • Senior ASIC Design Engineer…

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU ... and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for...The clocks team interacts with the floor-planning and back end team to help craft the physical floorplan of… more
    NVIDIA (10/22/24)
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  • ASIC /FPGA Research Engineer - Digital…

    University of Southern California (Arlington, VA)
    …opening in Arlington, VA for anASIC/FPGA Research Engineer - Digital Design, to perform front - end digital design of advanced ASIC or FPGA-based prototypes ... ASIC /FPGA Research Engineer - Digital DesignApply (https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Arlington-VA/ ASIC -FPGA-Research-Engineer… more
    University of Southern California (11/20/24)
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  • Senior Synthesis Flow CAD Engineer

    NVIDIA (Santa Clara, CA)
    …diverse team creating NVIDIA's chip design methodology! We're responsible for the Front - End Design Implementation methodology for all of NVIDIA's semiconductor ... design implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams...experience; MS preferred + Be familiar with Verilog and ASIC design along with experience in commercial EDA tools… more
    NVIDIA (11/02/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …and scalable manner + Identify inefficiencies and improvement opportunities in the front - end chip implementation process and propose ideas to tackle them ... NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation,...+ Own front - end design quality checks and reviews to… more
    NVIDIA (10/24/24)
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  • Senior Hardware Engineer - Micro-Architect

    quadric.io, Inc (Burlingame, CA)
    …Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front - end design + Proficiency in SystemC, SystemVerilog, or Verilog ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...+ Contribute to timing closure through full product cycle ( front end , back- end , tapeout) Requirements:… more
    quadric.io, Inc (11/13/24)
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  • Senior Research Engineer I

    University of Southern California (Arlington, VA)
    …Group (RCG) at ISI is a leader in disrupting and advancing the fields of front - end ASIC and FPGA design, reconfigurable architectures, and EDA tools. As ... Senior Research Engineer IApply (https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Arlington-VA/ Senior -Research-Engineer-I\_REQ20140783/apply) Viterbi… more
    University of Southern California (10/29/24)
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  • Senior DFT Engineer

    Cisco (San Jose, CA)
    …San Jose, CA with a primary focus on Design-for-Test. You will work with Front - end RTL teams, backend physical design teams to understand chip architecture and ... drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and… more
    Cisco (10/17/24)
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  • Sr. Design Verification Manager, Annapurna Labs

    Amazon (Cupertino, CA)
    …level degree in computer science or electrical engineering - Hands on experience with front - end logic design Amazon is committed to a diverse and inclusive ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (11/16/24)
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  • Sr. MMIC Design Engineer (Silicon Engineering)

    SpaceX (Redmond, WA)
    …compatibility in all aspects of implementation in the system. + Simulate/model MMIC front end circuits (power amplifiers, low noise amplifiers, switches) at the ... and electromagnetic level, working with system architects, modem/DSP and ASIC engineers to partition functions between hardware and software...Deep understanding of theory and MMIC design of RF front end blocks, from S-band to E-band… more
    SpaceX (10/16/24)
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  • Principal Digital IC Design Engineer

    RTX Corporation (Sacramento, CA)
    …the tasks listed above on your own. Candidates must have experience with both Front - End Digital Design (RTL writing and verification) and Back- End Digital ... part of this team, you will be participating in mixed-signal ASIC /ROIC development activities with cross-functional teams including chip architecture, specification,… more
    RTX Corporation (11/21/24)
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  • Sr. RF/Microwave Engineer (Silicon Engineering)

    SpaceX (Redmond, WA)
    …performance and capabilities of the Starlink network. RESPONSIBILITIES: + Simulate/model RF front - end systems, working with system architects, modem/DSP and ... support critical milestones COMPENSATION AND BENEFITS: Pay range: RF Software Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual level and base salary… more
    SpaceX (10/21/24)
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