• Senior ASIC Integration

    Palo Alto Networks (Santa Clara, CA)
    …goal is to create an environment where we all win with precision. **Your Career** As an ASIC Integration and CAD Engineer, you will ensure that the ASICs in ... equivalent military experience - MSEE preferred + Minimum 5 years experience in ASIC integration and front end design + Demonstrated success in taking ASICs to… more
    Palo Alto Networks (12/21/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …to build sophisticated GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design, CAD , Package Design, Software, DFT and other teams. ... NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation,...Engineer with a curiosity about SOC design automation, RTL integration , chip build and assembly, and padring design and… more
    NVIDIA (10/24/24)
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  • GPS Senior Specialist, Electrical Engineer

    L3Harris (Anaheim, CA)
    Job Title: Senior Specialist, Electrical Engineer Job Code: 19588 Job Location: Anaheim, CA (Vermont Ave. IEC) Job Schedule: 4/10 Work Schedule Job Description: As a ... and flow down applicable requirements to other groups (software, ASIC , & test) so that they can contribute to...+ Ability to contribute to execution of design, build, integration and test activities, problem resolution and verifying that… more
    L3Harris (12/25/24)
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  • Sr. Director, EDA Engineering

    Skyworks (Irvine, CA)
    …other divisional engineering leaders to ensure commercial success. As the EDA/ CAD (Electronic Design Automation/Computer-Aided Design) Senior Director of ... environment, encouraging professional growth and skill development among team members. * EDA/ CAD Tool Selection and Integration : Evaluate, select, and implement… more
    Skyworks (11/14/24)
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  • Senior DFT Engineer

    Cisco (San Jose, CA)
    …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... * Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation… more
    Cisco (10/17/24)
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  • Sr. Physical Design Methodology Engineer,…

    Amazon (Cupertino, CA)
    …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and ... Define, develop and deploy innovative physical design methodologies (RTL2GDS) and CAD flows for ML Accelerator chips in advanced nodes Drive improvement… more
    Amazon (10/18/24)
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  • Sr. DDR IP Design Engineer (Silicon Engineering)

    SpaceX (Sunnyvale, CA)
    …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual ... cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more
    SpaceX (10/21/24)
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  • Physical Design Engineer, Annapurna Labs

    Amazon (Cupertino, CA)
    …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
    Amazon (11/01/24)
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  • FPGA Engineer

    Leidos (San Diego, CA)
    …performance. + Support electrical engineering activities including FPGA designs and system integration and testing with CAD and lab activities. + Collaborate ... government customers. + Execute FPGA test plans, determine root cause of test failures, and iterate with senior staff to determine design changes to improve FPGA… more
    Leidos (10/18/24)
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