- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Test Timing Engineer to join our dynamic and growing team. ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...DFX, Clocks, and other teams in coming up with timing closure strategy, creating timing constraints, driving… more
- NVIDIA (Westford, MA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at...from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and… more
- Northrop Grumman (Linthicum Heights, MD)
- …career. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified, diverse ... an active DoD Secret clearance.** **Roles and Responsibilities:** + Responsible for static timing analysis on digital designs to ensure timing requirements are… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs and SoCs at block… more
- Northrop Grumman (Jessup, MD)
- …deliver remarkable new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital circuits. ... System Verilog or VHDL RTL + Circuit synthesis, formal verification, and static timing using state-of-the-art digital ASIC design tools + Developing verification… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a ... service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... Make the choice to join us today. With the System- ASIC team, you will contribute to designing multiple products...be responsible for the RTL design, logic synthesis, and timing analysis of several modules. + Integrate modules into… more
- RTX Corporation (Cedar Rapids, IA)
- …None/Not Required Are you interested in becoming part of a growing Avionics FPGA/ ASIC team? This position is for a highly experienced, highly motivated Electrical or ... Computer Engineer that will be involved in the design, implementation,...Will Do:** + Requirements capture, decomposition, and traceability. + ASIC /FPGA/SoPC digital architecture development and design. + Develop RTL… more
- Northrop Grumman (Jessup, MD)
- …of our mission! Northrop Grumman Mission Systems (NGMS) is seeking a Sr. Staff ASIC Physical Design Engineer to support our growing engineering team in advanced ... of ASIC Design + Proficient in backend ASIC design including synthesis and static timing ...backend ASIC design including synthesis and static timing analysis, place and route, physical verification (LVS/DRC) +… more
- Cisco (Maynard, MA)
- …haul telecommunication networks. Acacia's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography ... breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact As a Physical Design Engineer , you will play a key role in the full… more
- Northrop Grumman (Linthicum Heights, MD)
- …Static Timing Analysis would be a plus + Active Clearance or higher ** Senior Principal Engineer Basic Qualifications:** + Bachelor's degree with 8 years of ... and Responsibilities:** + Responsible for DFT (Design for Testabilty) aspects of ASIC Design thorough understanding of digital design concepts + Responsible with … more
- RTX Corporation (El Segundo, CA)
- …of a rapidly evolving global market. This position is for a motivated Senior Electrical or Computer engineering candidate to be involved in the design, ... Technologies team. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL,... / FPGA digital architecture and design using RTL, timing closure, verification, and system integration + Recommend new… more
- RTX Corporation (Cedar Rapids, IA)
- …of a rapidly evolving global market. This position is for a motivated Senior Electrical or Computer engineering candidate to be involved in the design, ... Technologies team. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL,... / FPGA digital architecture and design using RTL, timing closure, verification, and system integration + Recommend new… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic ... checks, etc. + Help in all aspects of physical design, such as driving timing convergence, timing constraints generation and management, and ECO generation and… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking ... micro-architecture, implement in RTL, and deliver a fully verified, synthesis/ timing clean design. + Collaborate with architects, verification engineers, formal… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $160,000.00 - $220,000.00/per year Your actual… more
- Google (San Diego, CA)
- Senior ASIC Engineer , IP Design, Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA; San Diego, CA, USA **Mid** Experience driving progress, ... like Python or Perl. + Experience with ARM-based SoCs, interconnects and ASIC methodology. **Preferred qualifications:** + Master's degree or PhD in Electrical… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL. +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Strong familiarity and experience with all stages of ASIC design flow including front end design and verification,...flow including front end design and verification, DFT, and timing analysis + Strong team player with outstanding interpersonal… more
- SpaceX (Irvine, CA)
- …to work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC Design Engineer / Senior : $160,000.00 - $220,000.00/per year Your actual ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine,...that in top level and deliver the fully verified, synthesis/ timing clean design + Work closely with verification team… more