- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA ... technology-focused company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- NVIDIA (Santa Clara, CA)
- …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...in EE/CS - 5+ years of experience in developing physical design methodology or CAD… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
- NVIDIA (Santa Clara, CA)
- …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... We are looking for a Senior CPU Implementation Methodology Engineer to...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- … Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. What you'll be doing: + Define and implement tools… more
- NVIDIA (Santa Clara, CA)
- … needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation ... Methodology engineer with proven experience in high-speed logic design and verification. In order to support high frequency...solutions for supporting high speed Clocking. + Understand the physical aspects of the chip and develop better clock… more
- Stanford University (Stanford, CA)
- …and interpersonal skills will be crucial to success. The chief of data analytics, methodology and integration will be required to: design , develop, optimize, and ... Chief of Data Analytics, Methodology , and Integration **Hoover Institution, Stanford, California, United...integrity of the US research enterprise. This is a senior -level role for a versatile individual with proven leadership… more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_ **Requisition ID:** _077101_ more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- Broadcom (San Jose, CA)
- …and features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- The Boeing Company (Huntington Beach, CA)
- …external wafer fabrication but performs design (architecture, RTL, synthesis, circuits, physical design , verification, packaging and test) in house. SSED has ... these projects. We are seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead)** with...Methodology (UVM) + Experience working on large-scale SoC design teams. + Experience developing digital ASICs and SoCs… more
- Jacobs (Arlington, VA)
- …clients. These services include feasibility studies, project development studies, design guidelines, facility master plans, workplace strategies, visioning sessions, ... three specific core service lines - Facility Strategies, Urban Design and Planning, and Visual Media. The APG team...and other related disciplines. The primary duties of the Senior Planner/ Senior Project Manager are to lead… more
- Jacobs (St. Louis, MO)
- …each project you will directly interface and collaborate with the discipline leads, senior Project Architect (and potentially a Design Manager). You are ... #Cities&Places #BIAEast #JPM Required Skills: * Strong knowledge of design , trends, construction methodology , material application, and manufacturer-supplier… more
- Capgemini (Santa Clara, CA)
- **Job Title:** ** Design Verification Engineer** **Job Location: Santa Clara CA** **Job description:** *Architect and Create verification environments using ... System-Verilog and Universal verification methodology -UVM IPs and SoCs with embedded CPUs and analog...and Gate simulations and resolve them by working with design engineers. * Create low power testcases using UPF… more
- onsemi (East Greenwich, RI)
- …lead in analog/mixed-signal design to join a diverse, talented, and global methodology engineering team. As a Design Engineer your extensive experience and ... the success of the AMG team that develops, maintains, and deploys the analog/mixed-signal design methods and tool flows that are shared by new product and IP… more
- Northrop Grumman (Linthicum, MD)
- …hours are potentially available. This requisition maybe filled at either **Principal Physical Vapor Deposition (PVD)** **Process Engineer** or ** Senior Principal ... able to work 2nd shift is Monday-Fri, 2:00PM-11:00PM **Basic Qualifications for Senior Principal** ** Physical Vapor Deposition (PVD)** **Process Engineer:** *… more