- Cadence Design Systems, Inc. (Austin, TX)
- …technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience in scan chain ... of professional experience in SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT insertion flows +… more
- Northrop Grumman (Linthicum Heights, MD)
- …and Static Timing Analysis would be a plus + Active Clearance or higher ** Senior Principal Engineer Basic Qualifications:** + Bachelor's degree with 8 years of ... to obtain and maintain an active clearance.** **Roles and Responsibilities:** + Responsible for DFT ( Design for Testabilty) aspects of ASIC Design thorough… more
- Northrop Grumman (Jessup, MD)
- … level. Qualifications for both are listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's degree ... RTL to gates (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion) + Proficiency with current ASIC design tools for all… more
- Celestica (San Jose, CA)
- …131053 Region: Americas Country: USA State/Province: California City: San Jose **Summary** The Principal Engineer, PCB Layout is a senior technical leader and ... stringent signal integrity, power integrity, and DFM requirements. The Principal Engineer leads PCB strategy and owns the end-to-end...for Manufacturability (DFM), Design for Assembly (DFA), Design for Test ( DFT ), and Design… more
- RTX Corporation (Cedar Rapids, IA)
- …role. **Security Clearance:** None/Not Required We are seeking a highly motivated Senior Principal Electrical Engineer to join the Computing Products Hardware ... Design to Cost (DTC+), Design for Manufacturing (DFM), Design for Test ( DFT ) + Project leadership experience **What We Offer:** Benefits: Some of our… more
- Northrop Grumman (Linthicum Heights, MD)
- …or Computer Engineering + Knowledge of Synthesis, Place & Route (P&R), and Design -for-Test ( DFT ) methodologies + Active DoD Secret Clearance or higher + ... and perform or propose changes to fix them + Work closely with design , verification, design -for-test and physical design teams to optimize the timing and… more
- Curtiss-Wright Corporation (Newtown, PA)
- …a Principal PCB Designer to lead our advanced Printed Circuit Board (PCB) design initiatives. As a senior technical authority within our Design and ... Partner with PCB fabrication and assembly vendors to optimize DFM ( Design for Manufacturing) and DFT ( Design for Test) processes, ensuring scalability and… more
- Keurig Dr Pepper (Burlington, MA)
- **Job Overview:** We are seeking a highly experienced and innovative ** Principal Electrical Engineer** to lead the design , development, and validation of ... KDP technology organization. **Key Responsibilities** + End-to-end ownership of PCBA design , test, and debug for appliances + Architect system-level electrical… more
- Microsoft Corporation (Redmond, WA)
- …Engineering (CSME) organization within SCHIE is responsible for design , development, manufacturing and packaging of Microsoft's state-of-the-art computer ... optimize the Cloud infrastructure. We are looking for a ** Principal Debug Engineer** to join the team. **Responsibilities** +...to join the team. **Responsibilities** + This is a senior technologist role that will guide Microsoft's strategy and… more
- Celestica (San Jose, CA)
- …Overview** Functional Area: Engineering (ENG) Career Stream: Engineering (ENG) Role: Senior Director (SDR) Job Title: Senior Director, Manufacturing and ... required. **Detailed Description** Responsibilities Lead Technical Engagement: * Serve as the principal technical advisor and leader for a key customer, fostering a… more