- Google (Mountain View, CA)
- …cache hierarchy, pipelining, and memory subsystems. + 5 years of experience in SoC power management or low power design/methodology. + Experience with ... Application-Specific Integrated Circuit (ASIC) low power flows and power ...from CPU architecture and design to schedulers, governors and post- silicon tuning for power and performance. +… more
- Amazon (Redmond, WA)
- …unserved and underserved communities around the world. Come work at Amazon! As Senior Silicon Validation Engineer, you will engage with an experienced ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...silicon . - Conduct in-system s-parameter, signal integrity, and power integrity measurements and compare with simulation models. -… more
- Amazon (Redmond, WA)
- …and underserved communities around the world. Come work at Amazon! The Role: As Senior Silicon ATE Hardware Engineer, you will engage with an experienced ... Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband… more
- NVIDIA (Santa Clara, CA)
- …related areas. + Strong fundamentals on digital design, boot/reset architecture, low power features, clocking, timing, noise, micro-architecture, high-speed IO; ... level boot flows, sequences, policies, and features to address functional, perf, power , and productization needs for NVIDIA's silicon designs. + Collaborate… more
- Google (Mountain View, CA)
- …point of view. + Experience with Advanced RISC Machine (ARM) or other low - power processor architectures. Preferred qualifications: + Master's degree or PhD in ... Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to… more
- Amazon (San Diego, CA)
- Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband ... communities around the world. Come work at Amazon! As Senior RF ATE Engineer, you will engage with an...test methodology of mm-wave RFICs for Project Kuiper custom silicon . You'll be part of the team that creates… more
- Google (Mountain View, CA)
- …SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low - power design techniques. + Experience ... checks. Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products.… more
- SpaceX (Redmond, WA)
- …to production ramp-up, to on-orbit telemetry monitoring. RESPONSIBILITIES: + Bring up new RF silicon as the first engineer to power on chips for the very ... time + Design and build modular, reusable software driver libraries for low -level silicon control with special attention to timing, throughput, performance,… more
- Google (Mountain View, CA)
- …+ Experience with ASIC design methodologies for clock domain checks, reset checks and low power design. + Domain knowledge in one of these areas: Processor ... logic synthesis techniques to optimize RTL code, performance and power as well as low - power ...part of a team that pushes boundaries, developing custom silicon solutions that power the future of… more
- SpaceX (Irvine, CA)
- …on multiple silicon projects that are driving more integration, lower power , mixed signal architectures and advanced silicon technology for deployment in ... as needed to meet critical milestones COMPENSATION AND BENEFITS: Pay range: Silicon Engineer/ Senior : $130,000.00 - $180,000.00/per year Your actual level and… more
- SpaceX (Irvine, CA)
- … power intent verification and post synthesis timing validation flows + Execute low power design and physical synthesis, deploying knowledge of unified ... Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer ( Silicon Engineering) at SpaceX Irvine, CA SpaceX was...flow, top-down and bottom-up design methodologies + Knowledge of low - power methodologies and leakage/dynamic power … more
- Amazon (Austin, TX)
- Description Annapurna Labs develops the silicon used in our most advanced machine learning accelerator servers, utilizing the latest process nodes and massively ... classic ATE platforms to create a clean running extremely low DPPM product-line forming the foundation to our servers....our final product is a server, not just the silicon , you will find yourself stretching beyond structural testing… more
- SpaceX (Redmond, WA)
- …all aspects of implementation in the system + Simulate/model MMIC front end circuits ( power amplifiers, low noise amplifiers, switches) at the circuit level and ... Sr. MMIC Design Engineer ( Silicon Engineering) at SpaceX Redmond, WA SpaceX was...MMIC design of linear and non-linear circuits such as power amplifiers, low noise amplifiers, mixers, filters… more
- Silicon Valley Power (Santa Clara, CA)
- …Simple Cycle, Combined Cycle, and Cogeneration technologies. It is the mission of Silicon Valley Power to be a progressive, service-oriented utility, offering ... City of Santa Clara and its customers while maintaining low residential rates and offering competitive rates for all...and offering competitive rates for all customers. The Positions: Silicon Valley Power is recruiting to fill… more
- SpaceX (Redmond, WA)
- …circuits such as phase-locked loops, vector modulators/demodulators, oscillators, mixers, filters, low noise and power amplifiers + Knowledge of digital ... Sr. RF/Analog IC Design Engineer ( Silicon Engineering) at SpaceX Redmond, WA SpaceX was...milestones COMPENSATION AND BENEFITS: Pay range: RF/Analog IC Design Engineer/ Senior : $160,000.00 - $220,000/per year Your actual level and… more
- SpaceX (Redmond, WA)
- …theory + Experience with design of linear and non-linear circuits such as power amplifiers, low noise amplifiers, mixers, filters and PLLs + Thorough ... Sr. RF/Microwave Engineer ( Silicon Engineering) at SpaceX Redmond, WA SpaceX was...critical milestones COMPENSATION AND BENEFITS: Pay range: RF Software Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual level and… more
- Global Foundries (Essex Junction, VT)
- …the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Summary of ... Role:GlobalFoundries (GF) is seeking a senior level, self-driven professional with proven expertise to develop leading-edge test solutions for high-speed,… more
- Qualcomm (Santa Clara, CA)
- …Technology team you will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation, power estimates ... specifications from Architectural and systems requirements and deliver detailed low power micro-architecture and design. Also work...bring up. The candidate is also responsible for the silicon power measurements, Si debug and … more
- NVIDIA (Santa Clara, CA)
- …is fueled by its great technology and amazing people. We are seeking a Senior Power and Performance Architect to influence, innovate and drive next generation ... product systems; for products ranging from largescale datacenters to low - power client devices. + Lead the team...+ Expertise and deep understanding in the areas of silicon power , transistor/device physics, power … more
- NVIDIA (Santa Clara, CA)
- …alignment. What you'll be doing: + Build roadmaps of system level features to address low power , low noise, perf/watt efficient product needs by doing ... equivalent experience. + 8+ years of proven experience in silicon power architecture, system level design, validation,.../performance optimization. + Strong EE fundamentals on digital design, low power design, DVFS, control systems, signal… more